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authorNicolas Boichat <drinkcat@google.com>2016-12-19 17:51:57 +0100
committerchrome-bot <chrome-bot@chromium.org>2017-01-05 18:40:00 -0800
commit097008c51a5079dee002d4b33c02cf56d1517d6d (patch)
tree7e319c037447043800471eea7e38f52cc59a582d /board/poppy/gpio.inc
parentb1101b8ed66f751c1a66108357c897677e582ccb (diff)
downloadchrome-ec-097008c51a5079dee002d4b33c02cf56d1517d6d.tar.gz
poppy: Add new board
Add support for poppy board with: - chip: npcx - pmic: bd999992GW - charger: isl9238 - tcpc: 1x anx3429, 1x ps8751 - bc12: pi3usb9218c BRANCH=none BUG=chrome-os-partner:61098 TEST=make BOARD=poppy -j Change-Id: I3439399b85ba49b4c733536d614118faeeeb0f93 Reviewed-on: https://chromium-review.googlesource.com/422263 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
Diffstat (limited to 'board/poppy/gpio.inc')
-rw-r--r--board/poppy/gpio.inc119
1 files changed, 119 insertions, 0 deletions
diff --git a/board/poppy/gpio.inc b/board/poppy/gpio.inc
new file mode 100644
index 0000000000..e3d3ef4271
--- /dev/null
+++ b/board/poppy/gpio.inc
@@ -0,0 +1,119 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Declare symbolic names for all the GPIOs that we care about.
+ * Note: Those with interrupt handlers must be declared first. */
+
+GPIO_INT(USB_C0_PD_INT_ODL, PIN(3, 7), GPIO_INT_FALLING, tcpc_alert_event)
+GPIO_INT(USB_C1_PD_INT_ODL, PIN(C, 5), GPIO_INT_FALLING, tcpc_alert_event)
+GPIO_INT(PCH_SLP_S0_L, PIN(7, 5), GPIO_INT_BOTH, power_signal_interrupt)
+/* Use VW signals instead of GPIOs */
+#ifndef CONFIG_ESPI_VW_SIGNALS
+GPIO_INT(PCH_SLP_S3_L, PIN(7, 3), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PCH_SLP_S4_L, PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt)
+#endif
+GPIO_INT(PCH_SLP_SUS_L, PIN(6, 2), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(RSMRST_L_PGOOD, PIN(B, 0), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(PMIC_DPWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
+GPIO_INT(POWER_BUTTON_L, PIN(0, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt)
+GPIO_INT(LID_OPEN, PIN(6, 7), GPIO_INT_BOTH, lid_interrupt)
+GPIO_INT(VOLUME_DOWN_L, PIN(8, 3), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
+GPIO_INT(VOLUME_UP_L, PIN(8, 2), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)
+GPIO_INT(WP_L, PIN(4, 0), GPIO_INT_BOTH, switch_interrupt)
+GPIO_INT(AC_PRESENT, PIN(C, 1), GPIO_INT_BOTH, extpower_interrupt)
+GPIO_INT(USB_C0_BC12_INT_L, PIN(D, 3), GPIO_INT_FALLING, usb0_evt)
+GPIO_INT(USB_C1_BC12_INT_L, PIN(3, 3), GPIO_INT_FALLING, usb1_evt)
+
+GPIO(PCH_RTCRST, PIN(E, 7), GPIO_OUT_LOW) /* RTCRST# to SOC */
+GPIO(ENABLE_BACKLIGHT, PIN(2, 6), GPIO_OUT_LOW) /* Enable Backlight */
+GPIO(WLAN_OFF_L, PIN(7, 2), GPIO_OUT_LOW) /* Disable WLAN */
+GPIO(PP3300_DX_WLAN, PIN(A, 7), GPIO_OUT_LOW) /* Enable WLAN 3.3V Power */
+GPIO(CPU_PROCHOT, PIN(8, 1), GPIO_OUT_HIGH) /* PROCHOT# to SOC */
+GPIO(PCH_ACOK, PIN(5, 0), GPIO_ODR_LOW) /* ACOK to SOC */
+GPIO(PCH_WAKE_L, PIN(A, 3), GPIO_ODR_HIGH) /* Wake SOC */
+GPIO(PCH_RSMRST_L, PIN(7, 0), GPIO_OUT_LOW) /* RSMRST# to SOC */
+GPIO(PCH_PWRBTN_L, PIN(4, 1), GPIO_ODR_HIGH) /* Power Button to SOC */
+GPIO(EC_PLATFORM_RST, PIN(A, 6), GPIO_INPUT) /* EC Reset from H1 */
+GPIO(SYS_RESET_L, PIN(6, 1), GPIO_ODR_HIGH) /* Cold Reset to SOC */
+GPIO(PMIC_SLP_SUS_L, PIN(8, 5), GPIO_OUT_LOW) /* SLP_SUS# to PMIC */
+GPIO(BATTERY_PRESENT_L, PIN(3, 4), GPIO_INPUT) /* Battery Present */
+GPIO(CCD_MODE_ODL, PIN(6, 3), GPIO_INPUT) /* Case Closed Debug Mode */
+GPIO(EC_HAVEN_RESET_ODL, PIN(0, 2), GPIO_ODR_HIGH) /* H1 Reset */
+GPIO(ENTERING_RW, PIN(7, 6), GPIO_OUTPUT) /* EC Entering RW */
+GPIO(PMIC_INT_L, PIN(6, 0), GPIO_INPUT) /* PMIC interrupt */
+
+/* Sensor interrupts, not implemented yet */
+/* TODO(crosbug.com/p/61098): Implement */
+GPIO(ACCELGYRO3_INT_L, PIN(3, 6), GPIO_INPUT)
+GPIO(ALS_INT_L, PIN(2, 5), GPIO_INPUT)
+GPIO(FP_INT_L, PIN(5, 6), GPIO_INPUT)
+
+/* TODO(crosbug.com/p/61098): Make use of these GPIOs */
+GPIO(PP1800_DX_SENSOR, PIN(1, 4), GPIO_OUTPUT)
+GPIO(PP3300_DX_SENSOR, PIN(2, 1), GPIO_OUTPUT)
+GPIO(PP3300_USB_PD, PIN(2, 0), GPIO_OUTPUT)
+
+GPIO(PP5000_DX_NFC, PIN(1, 5), GPIO_OUTPUT)
+
+GPIO(PP3300_DX_CAM, PIN(1, 0), GPIO_OUTPUT)
+GPIO(CAM_PMIC_RST_L, PIN(0, 7), GPIO_OUTPUT)
+
+GPIO(WLAN_PE_RST, PIN(1, 2), GPIO_OUTPUT)
+GPIO(PP3300_DX_LTE, PIN(0, 5), GPIO_OUTPUT)
+GPIO(LTE_GPS_OFF_L, PIN(0, 0), GPIO_OUTPUT)
+GPIO(LTE_BODY_SAR_L, PIN(0, 1), GPIO_OUTPUT)
+GPIO(LTE_WAKE_L, PIN(7, 1), GPIO_INPUT)
+
+GPIO(PP3300_DX_BASE, PIN(1, 1), GPIO_OUTPUT)
+/* TODO(crosbug.com/p/61098): Should be interrupt+ADC */
+GPIO(BASE_DET_A, PIN(4, 5), GPIO_INPUT)
+
+/* I2C pins - these will be reconfigured for alternate function below */
+GPIO(I2C0_0_SCL, PIN(B, 5), GPIO_INPUT) /* EC_I2C0_0_USBC_3V3_SCL */
+GPIO(I2C0_0_SDA, PIN(B, 4), GPIO_INPUT) /* EC_I2C0_0_USBC_3V3_SDA */
+GPIO(I2C0_1_SCL, PIN(B, 3), GPIO_INPUT) /* EC_I2C0_1_3V3_SCL */
+GPIO(I2C0_1_SDA, PIN(B, 2), GPIO_INPUT) /* EC_I2C0_1_3V3_SDA */
+GPIO(I2C1_SCL, PIN(9, 0), GPIO_INPUT) /* EC_I2C1_3V3_SCL */
+GPIO(I2C1_SDA, PIN(8, 7), GPIO_INPUT) /* EC_I2C1_3V3_SDA */
+GPIO(I2C2_SCL, PIN(9, 2), GPIO_INPUT) /* EC_I2C2_PMIC_3V3_SCL */
+GPIO(I2C2_SDA, PIN(9, 1), GPIO_INPUT) /* EC_I2C2_PMIC_3V3_SDA */
+GPIO(I2C3_SCL, PIN(D, 1), GPIO_INPUT) /* EC_I2C3_SENSOR_1V8_SCL */
+GPIO(I2C3_SDA, PIN(D, 0), GPIO_INPUT) /* EC_I2C3_SENSOR_1V8_SDA */
+
+/* 5V enables: INPUT=1.5A, OUT_LOW=OFF, OUT_HIGH=3A */
+GPIO(USB_C0_5V_EN, PIN(4, 2), GPIO_OUT_LOW | GPIO_PULL_UP) /* C0 5V Enable */
+GPIO(USB_C0_CHARGE_L, PIN(C, 0), GPIO_OUT_LOW | GPIO_PULL_UP) /* C0 Charge enable */
+GPIO(USB_C1_5V_EN, PIN(B, 1), GPIO_OUT_LOW | GPIO_PULL_UP) /* C1 5V Enable */
+GPIO(USB_C1_CHARGE_L, PIN(C, 3), GPIO_OUT_LOW | GPIO_PULL_UP) /* C0 Charge enable */
+GPIO(USB_C0_CABLE_DET, PIN(D, 2), GPIO_INPUT) /* C0 Cable Detect */
+GPIO(USB_C0_PD_RST_L, PIN(0, 3), GPIO_OUT_LOW) /* C0 PD Reset */
+GPIO(USB_C1_PD_RST_L, PIN(7, 4), GPIO_OUT_LOW) /* C1 PD Reset */
+GPIO(USB_C0_DP_HPD, PIN(9, 4), GPIO_INPUT) /* C0 DP Hotplug Detect */
+GPIO(USB_C1_DP_HPD, PIN(A, 5), GPIO_INPUT) /* C1 DP Hotplug Detect */
+GPIO(USB_C0_TCPC_PWR, PIN(8, 4), GPIO_OUT_LOW) /* Enable C0 TCPC Power */
+GPIO(USB_C1_TCPC_PWR_NC, PIN(3, 2), GPIO_OUT_LOW) /* Enable C1 TCPC Power: NC */
+GPIO(USB2_OTG_ID, PIN(A, 1), GPIO_ODR_LOW) /* OTG ID */
+GPIO(USB2_OTG_VBUSSENSE, PIN(9, 5), GPIO_OUT_LOW) /* OTG VBUS Sense */
+
+/* Board ID */
+GPIO(BOARD_VERSION1, PIN(C, 4), GPIO_INPUT) /* Board ID bit0 */
+GPIO(BOARD_VERSION2, PIN(C, 2), GPIO_INPUT) /* Board ID bit1 */
+GPIO(BOARD_VERSION3, PIN(1, 3), GPIO_INPUT) /* Board ID bit2 */
+
+/* Test points */
+GPIO(TP248, PIN(5, 7), GPIO_INPUT | GPIO_PULL_UP) /* EC_GPIO57 */
+GPIO(TP249, PIN(6, 6), GPIO_INPUT | GPIO_PULL_UP) /* EC_GPO66_ARM_L */
+GPIO(TP250, PIN(3, 5), GPIO_INPUT | GPIO_PULL_UP) /* EC_GPIO35_TEST_L */
+
+/* Alternate functions GPIO definitions */
+ALTERNATE(PIN_MASK(6, 0x30), 1, MODULE_UART, 0) /* GPIO64-65 */ /* UART from EC to Servo */
+ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* GPIO87 */ /* EC_I2C1_3V3_SDA */
+ALTERNATE(PIN_MASK(9, 0x01), 1, MODULE_I2C, 0) /* GPIO90 */ /* EC_I2C1_3V3_SCL */
+ALTERNATE(PIN_MASK(9, 0x06), 1, MODULE_I2C, 0) /* GPIO91-92 */ /* EC_I2C2_PMIC_3V3_SDA/SCL */
+ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* GPIOB4-B5 */ /* EC_I2C0_0_USBC_3V3_SDA/SCL */
+ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, 0) /* GPOPB2-B3 */ /* EC_I2C0_1_3V3_SDA/SCL */
+ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* GPIOD0-D1 */ /* EC_I2C3_SENSOR_1V8_SDA/SCL */