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| author | Peter Marheine <pmarheine@chromium.org> | 2020-02-04 14:33:46 +1100 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-02-06 01:16:02 +0000 |
| commit | 7d9d31e4d9706d4f5cc8859d6f07b3fc61e4f64c (patch) | |
| tree | 449aacb2ff3f16c95d3a70a33ca52461bacd4c4a /board/puff | |
| parent | 7da0c93d6d99e79d17f56ae18e41a8572148358f (diff) | |
| download | chrome-ec-7d9d31e4d9706d4f5cc8859d6f07b3fc61e4f64c.tar.gz | |
puff: enable PP5000_HDMI and CPU C10 gating
TEST=Verified proto can turn off the relevant core rails:
* Pretend to be an EVT board: ectool cbi set 0 1
* Reboot EC
* Drop to S0ix: echo freeze > /sys/power/state
* Verify CPU_C10_GATE is asserted (powerindebug) and EN_S0_RAILS
is deasserted (gpioget EN_S0_RAILS)
* Wake system and ensure it resumes correctly
BUG=b:144719399
BRANCH=None
Change-Id: I8e4158ffac38461e8679ac49a084b4296bcef210
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2035432
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Diffstat (limited to 'board/puff')
| -rw-r--r-- | board/puff/board.c | 36 | ||||
| -rw-r--r-- | board/puff/gpio.inc | 2 |
2 files changed, 37 insertions, 1 deletions
diff --git a/board/puff/board.c b/board/puff/board.c index ab7f2968c2..ac0d40d8c4 100644 --- a/board/puff/board.c +++ b/board/puff/board.c @@ -27,6 +27,7 @@ #include "host_command.h" #include "lid_switch.h" #include "power.h" +#include "power/cometlake-discrete.h" #include "power_button.h" #include "pwm.h" #include "pwm_chip.h" @@ -533,3 +534,38 @@ int extpower_is_present(void) { return adp_connected; } + +static uint16_t board_version; + +static void load_board_info(void) +{ + /* + * Load board info from CBI to control per-device configuration. + * + * If unset it's safe to treat the board as a proto, just C10 gating + * won't be enabled. + */ + uint32_t val; + + if (cbi_get_board_version(&val) == EC_SUCCESS && val <= UINT16_MAX) + board_version = val; + CPRINTS("Board Version: 0x%04x", board_version); +} +DECLARE_HOOK(HOOK_INIT, load_board_info, HOOK_PRIO_INIT_I2C + 1); + +int board_is_c10_gate_enabled(void) +{ + /* + * Puff proto drives EN_PP5000_HDMI from EN_S0_RAILS so we cannot gate + * core rails while in S0 because HDMI should remain powered. + * EN_PP5000_HDMI is a separate EC output on all other boards. + */ + return board_version != 0; +} + +void board_enable_s0_rails(int enable) +{ + /* This output isn't connected on protos; safe to set anyway. */ + gpio_set_level(GPIO_EN_PP5000_HDMI, enable); +} + diff --git a/board/puff/gpio.inc b/board/puff/gpio.inc index 178553f13b..82f53aa48b 100644 --- a/board/puff/gpio.inc +++ b/board/puff/gpio.inc @@ -30,7 +30,7 @@ GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) #endif GPIO_INT(PG_PP950_VCCIO_OD, PIN(1, 7), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(CPU_C10_GATE_L, PIN(6, 7), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(CPU_C10_GATE_L, PIN(6, 7), GPIO_INT_BOTH, c10_gate_interrupt) GPIO_INT(IMVP8_VRRDY_OD, PIN(1, 6), GPIO_INT_BOTH, power_signal_interrupt) /* Other interrupts */ |