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author | Scott Collyer <scollyer@google.com> | 2021-02-16 13:42:35 -0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-03-24 23:33:11 +0000 |
commit | d63ddef4a7c63066704c80f7e98d12911829a3c2 (patch) | |
tree | 40780a668242abccaf41fdce08e619b800f58feb /board/quiche/board.c | |
parent | 2cee0e2eb293cea2ccc1ae782de85480dc04d808 (diff) | |
download | chrome-ec-d63ddef4a7c63066704c80f7e98d12911829a3c2.tar.gz |
honeybuns: Add USB-PD for port C1 (user facing ALT-DP)
This CL adds support for honeybuns C1, which is the user facing usbc
port that also support ALT-DP mode. This CL adds support for both
gingergread and quiche.
Note that gingerbread is being checked in with a TODO for specifying
the PPC driver for C1. This is necessary to allow gingerbread to still
build while the solution for asymmetric port hardware is finalized.
BUG=b:183289386
BRANCH=None
TEST=Verified port C1 attaches to display adapters, usbpd hubs, and
type-c monitors
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: Iafbd5a38917601fc5055857662dd0e893d503948
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699456
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'board/quiche/board.c')
-rw-r--r-- | board/quiche/board.c | 73 |
1 files changed, 68 insertions, 5 deletions
diff --git a/board/quiche/board.c b/board/quiche/board.c index 081a279eb6..45dbe7d2dc 100644 --- a/board/quiche/board.c +++ b/board/quiche/board.c @@ -42,21 +42,38 @@ #ifdef SECTION_IS_RW static int pd_dual_role_init[CONFIG_USB_PD_PORT_MAX_COUNT] = { PD_DRP_TOGGLE_ON, + PD_DRP_FORCE_SOURCE, }; - static void ppc_interrupt(enum gpio_signal signal) { switch (signal) { case GPIO_HOST_USBC_PPC_INT_ODL: sn5s330_interrupt(USB_PD_PORT_HOST); break; + case GPIO_USBC_DP_PPC_INT_ODL: + sn5s330_interrupt(USB_PD_PORT_DP); + break; default: break; } } +static void tcpc_alert_event(enum gpio_signal s) +{ + int port = -1; + + switch (s) { + case GPIO_USBC_DP_MUX_ALERT_ODL: + port = USB_PD_PORT_DP; + break; + default: + return; + } + schedule_deferred_pd_interrupt(port); +} + void hpd_interrupt(enum gpio_signal signal) { usb_pd_hpd_edge_event(signal); @@ -123,10 +140,18 @@ struct ppc_config_t ppc_chips[] = { #ifdef SECTION_IS_RW /* TCPCs */ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { - { + [USB_PD_PORT_HOST] = { .bus_type = EC_BUS_TYPE_EMBEDDED, .drv = &stm32gx_tcpm_drv, }, + [USB_PD_PORT_DP] = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_I2C1, + .addr_flags = PS8751_I2C_ADDR2_FLAGS, + }, + .drv = &ps8xxx_tcpm_drv, + }, }; const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { @@ -136,6 +161,13 @@ const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { .i2c_addr_flags = PS8822_I2C_ADDR3_FLAG, .driver = &ps8822_usb_mux_driver, }, + [USB_PD_PORT_DP] = { + .usb_port = USB_PD_PORT_DP, + .i2c_port = I2C_PORT_I2C1, + .i2c_addr_flags = PS8751_I2C_ADDR2_FLAGS, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + }, }; /* USB-C PPC Configuration */ @@ -145,6 +177,11 @@ struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { .i2c_addr_flags = SN5S330_ADDR0_FLAGS, .drv = &sn5s330_drv }, + [USB_PD_PORT_DP] = { + .i2c_port = I2C_PORT_I2C1, + .i2c_addr_flags = SN5S330_ADDR2_FLAGS, + .drv = &sn5s330_drv + }, }; unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); @@ -155,19 +192,32 @@ const struct hpd_to_pd_config_t hpd_config = { void board_reset_pd_mcu(void) { - + cprints(CC_SYSTEM, "Resetting TCPCs..."); + cflush(); + gpio_set_level(GPIO_USBC_DP_PD_RST_L, 0); + gpio_set_level(GPIO_USBC_UF_RESET_L, 0); + msleep(PS8805_FW_INIT_DELAY_MS); + gpio_set_level(GPIO_USBC_DP_PD_RST_L, 1); + gpio_set_level(GPIO_USBC_UF_RESET_L, 1); + msleep(PS8805_FW_INIT_DELAY_MS); } void board_tcpc_init(void) { + board_reset_pd_mcu(); + /* Enable PPC interrupts. */ gpio_enable_interrupt(GPIO_HOST_USBC_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USBC_DP_PPC_INT_ODL); + /* Enable HPD interrupt */ + gpio_enable_interrupt(GPIO_DDI_MST_IN_HPD); + /* Enable TCPC interrupts. */ + gpio_enable_interrupt(GPIO_USBC_DP_MUX_ALERT_ODL); } -DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 2); enum pd_dual_role_states board_tc_get_initial_drp_mode(int port) { - return pd_dual_role_init[port]; } @@ -175,10 +225,23 @@ int ppc_get_alert_status(int port) { if (port == USB_PD_PORT_HOST) return gpio_get_level(GPIO_HOST_USBC_PPC_INT_ODL) == 0; + else if (port == USB_PD_PORT_DP) + return gpio_get_level(GPIO_USBC_DP_PPC_INT_ODL) == 0; return 0; } +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + if (!gpio_get_level(GPIO_USBC_DP_MUX_ALERT_ODL) && + gpio_get_level(GPIO_USBC_DP_PD_RST_L)) + status |= PD_STATUS_TCPC_ALERT_1; + + return status; +} + void board_overcurrent_event(int port, int is_overcurrented) { /* TODO(b/174825406): check correct operation for honeybuns */ |