honeybuns: Enable usbc support

This CL adds boards specific parts required to enable TCPMv2.0 for
both quiche and gingerbread. TCPMv2 configs are included, though, only
type-c support is being selected.

The reason for this intermediate point is an attempt to have more
manageable amounts of changes for CL reviews.

BUG=b:167601672
BRANCH=None
TEST=verfied type-c attaches properly on quiche

Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I2a4c3bf4089fb3e167d06921b177d8c4e61a021f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2215424
Tested-by: Scott Collyer <scollyer@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Auto-Submit: Scott Collyer <scollyer@chromium.org>

4 files changed, 108 insertions, 4 deletions

diff --git a/board/quiche/board.c b/board/quiche/board.c
index 46a19f4b5e..afcd9b1443 100644
--- a/board/quiche/board.c
+++ b/board/quiche/board.c
@@ -5,8 +5,35 @@
 
 /* Quiche board-specific configuration */
 
+#include "common.h"
+#include "driver/ppc/sn5s330.h"
+#include "driver/tcpm/ps8xxx.h"
+#include "driver/tcpm/stm32gx.h"
+#include "driver/tcpm/tcpci.h"
+#include "gpio.h"
 #include "hooks.h"
 #include "switch.h"
+#include "system.h"
+#include "task.h"
+#include "uart.h"
+#include "usb_pd.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args)
+
+static void ppc_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_HOST_USBC_PPC_INT_ODL:
+		sn5s330_interrupt(USB_PD_PORT_HOST);
+		break;
+
+	default:
+		break;
+	}
+}
 
 #include "gpio_list.h" /* Must come after other header files. */
 
@@ -42,8 +69,68 @@ const struct power_seq board_power_seq[] = {
 
 const size_t board_power_seq_count = ARRAY_SIZE(board_power_seq);
 
+/* TCPCs */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	{
+		.bus_type = EC_BUS_TYPE_EMBEDDED,
+		.drv = &stm32gx_tcpm_drv,
+	},
+};
+
+const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	[USB_PD_PORT_HOST] = {
+		.usb_port = USB_PD_PORT_HOST,
+		.driver = &virtual_usb_mux_driver,
+		.hpd_update = &virtual_hpd_update,
+	},
+};
+
+/* USB-C PPC Configuration */
+struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	[USB_PD_PORT_HOST] = {
+		.i2c_port = I2C_PORT_USBC,
+		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
+		.drv = &sn5s330_drv
+	},
+};
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+/* Power Delivery and charging functions */
+void board_tcpc_init(void)
+{
+	/* Enable PPC interrupts. */
+	gpio_enable_interrupt(GPIO_HOST_USBC_PPC_INT_ODL);
+}
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
+
+static void board_select_drp_mode(void)
+{
+	/*
+	 * Host port should operate as a dual role port. If it attaches as a
+	 * sink, then it will trigger a PRS to end up as a SRC UFP. The port's
+	 * DRP state only needs to be set once, after it's initialized in TCPMv2
+	 * as the default role of sink only.
+	 */
+	pd_set_dual_role(USB_PD_PORT_HOST, PD_DRP_TOGGLE_ON);
+	CPRINTS("ucpd: set drp toggle on");
+}
+DECLARE_DEFERRED(board_select_drp_mode);
+
 static void board_init(void)
 {
-	/* TODO */
+	hook_call_deferred(&board_select_drp_mode_data, 50 * MSEC);
 }
 DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+int ppc_get_alert_status(int port)
+{
+	if (port == USB_PD_PORT_HOST)
+		return gpio_get_level(GPIO_HOST_USBC_PPC_INT_ODL) == 0;
+
+	return 0;
+}
+
+void board_overcurrent_event(int port, int is_overcurrented)
+{
+	/* TODO(b/174825406): check correct operation for honeybuns */
+}
diff --git a/board/quiche/board.h b/board/quiche/board.h
index 48422e7a50..d5eb046424 100644
--- a/board/quiche/board.h
+++ b/board/quiche/board.h
@@ -15,6 +15,8 @@
 #define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */
 
 /* USB Type C and USB PD defines */
+#define USB_PD_PORT_HOST   0
+#define USB_PD_PORT_DP   1
 
 /* USB Type A Features */
 
@@ -25,6 +27,9 @@
 
 #include "registers.h"
 
+#define GPIO_TRIGGER_1 GPIO_USB3_A3_CDP_EN
+#define GPIO_TRIGGER_2 GPIO_USB3_A4_CDP_EN
+
 #endif /* !__ASSEMBLER__ */
 
 #endif /* __CROS_EC_BOARD_H */
diff --git a/board/quiche/ec.tasklist b/board/quiche/ec.tasklist
index c272906fc7..fb51fe2088 100644
--- a/board/quiche/ec.tasklist
+++ b/board/quiche/ec.tasklist
@@ -9,4 +9,5 @@
 
 #define CONFIG_TASK_LIST \
 	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
-	TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE)
+	TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C0, pd_task, NULL, VENTI_TASK_STACK_SIZE)
diff --git a/board/quiche/gpio.inc b/board/quiche/gpio.inc
index e6264c741e..1b90bf9e1e 100644
--- a/board/quiche/gpio.inc
+++ b/board/quiche/gpio.inc
@@ -8,6 +8,8 @@
 /* Declare symbolic names for all the GPIOs that we care about.
  * Note: Those with interrupt handlers must be declared first. */
 
+GPIO_INT(HOST_USBC_PPC_INT_ODL,  PIN(D,  9),      GPIO_INT_FALLING | GPIO_PULL_UP, ppc_interrupt)
+
 /* Power sequencing signals */
 GPIO(PWR_BTN,                       PIN(A,  0), GPIO_INPUT)
 GPIO(EN_AC_JACK,                    PIN(A,  1), GPIO_OUT_LOW)
@@ -38,8 +40,17 @@ GPIO(USBC_DP_PD_RST_L,              PIN(E,  9), GPIO_ODR_LOW)
 GPIO(USBC_UF_RESET_L,               PIN(D,  2), GPIO_ODR_LOW)
 
 /* USB Hubs signals */
-GPIO(EC_HUB2_RESET_L,               PIN(C,  5), GPIO_ODR_LOW)
-GPIO(EC_HUB3_RESET_L,               PIN(C, 10), GPIO_ODR_LOW)
+GPIO(EC_HUB2_RESET_L,               PIN(C,  5), GPIO_ODR_HIGH)
+GPIO(EC_HUB3_RESET_L,               PIN(C, 10), GPIO_ODR_HIGH)
+
+/* USB-A Current limit switches, set default to 1.5A */
+
+GPIO(USB3_A1_CDP_EN,                PIN(C,  3), GPIO_OUT_LOW)
+GPIO(USB3_A2_CDP_EN,                PIN(C,  2), GPIO_OUT_LOW)
+GPIO(USB3_A3_CDP_EN,                PIN(C,  0), GPIO_OUT_LOW)
+GPIO(USB3_A4_CDP_EN,                PIN(C,  1), GPIO_OUT_LOW)
+GPIO(USB3_A5_CDP_EN,                PIN(B,  9), GPIO_OUT_LOW)
+GPIO(USB3_A6_CDP_EN,                PIN(C, 13), GPIO_OUT_LOW)
 
 /* Write protect */
 GPIO(EC_FLASH_WP_ODL,               PIN(A,  3), GPIO_ODR_HIGH)