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authorScott Collyer <scollyer@google.com>2021-03-24 13:09:09 -0700
committerCommit Bot <commit-bot@chromium.org>2021-04-17 22:05:23 +0000
commitfba31a3ae244b6dfd18e4b59508aa45387161d81 (patch)
tree907e84f3517aa617a5eadfdbc9871268aad112f4 /board/quiche
parentc01b28e5da86b783917523beaa97b1b81d38019c (diff)
downloadchrome-ec-fba31a3ae244b6dfd18e4b59508aa45387161d81.tar.gz
honeybuns: Add C2 initialization with power button on/off
This CL refactors code required for the user facing usbc port. This port was only being initialized at init time and therefore would not function properly following a power button off/on. To avoid duplicating code, the functions used to initialize this port and control VBUS were moved to usbc_support in baseboard so they can be common and are now guarded by a GPIO macro so this can be board specific for variants which don't have a PPC to control on this port. BUG=b:164157329 BRANCH=quiche TEST=Verifed that port C2 attaches as expected following power button off/on sequence. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I2f9500f7e58de674c6f7c12a95cebad45de166cc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785198 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'board/quiche')
-rw-r--r--board/quiche/board.c44
-rw-r--r--board/quiche/board.h1
2 files changed, 3 insertions, 42 deletions
diff --git a/board/quiche/board.c b/board/quiche/board.c
index 1a3e6f058b..429c2257e9 100644
--- a/board/quiche/board.c
+++ b/board/quiche/board.c
@@ -80,23 +80,9 @@ void hpd_interrupt(enum gpio_signal signal)
usb_pd_hpd_edge_event(signal);
}
-void board_uf_manage_vbus(void)
-{
- int level = gpio_get_level(GPIO_USBC_UF_MUX_VBUS_EN);
-
- /*
- * GPIO_USBC_UF_MUX_VBUS_EN is an output from the PS8803 which tracks if
- * C2 is attached. When it's attached, this signal will be high. Use
- * this level to control PPC VBUS on/off.
- */
- ppc_vbus_source_enable(USB_PD_PORT_USB3, level);
- CPRINTS("C2: State = %s", level ? "Attached.SRC " : "Unattached.SRC");
-}
-DECLARE_DEFERRED(board_uf_manage_vbus);
-
static void board_uf_manage_vbus_interrupt(enum gpio_signal signal)
{
- hook_call_deferred(&board_uf_manage_vbus_data, 0);
+ baseboard_usb3_check_state();
}
static void board_pwr_btn_interrupt(enum gpio_signal signal)
@@ -289,30 +275,6 @@ enum pd_dual_role_states board_tc_get_initial_drp_mode(int port)
return pd_dual_role_init[port];
}
-static void board_config_usbc_uf_ppc(void)
-{
- int vbus_level;
-
- /*
- * This port is not usb-pd capable, but there is a ppc which must be
- * initialized, and keep the VBUS switch enabled.
- */
- ppc_init(USB_PD_PORT_USB3);
- vbus_level = gpio_get_level(GPIO_USBC_UF_MUX_VBUS_EN);
-
- CPRINTS("usbc: UF PPC configured. VBUS = %s",
- vbus_level ? "on" : "off");
-
- /*
- * Check initial state as there there may not be an edge event after
- * interrupts are enabled if the port is attached at EC reboot time.
- */
- ppc_vbus_source_enable(USB_PD_PORT_USB3, vbus_level);
-
- /* Enable VBUS control interrupt for C2 */
- gpio_enable_interrupt(GPIO_USBC_UF_MUX_VBUS_EN);
-}
-
__override uint8_t board_get_usb_pd_port_count(void)
{
/*
@@ -371,9 +333,7 @@ int dock_get_mf_preference(void)
static void board_init(void)
{
-#ifdef SECTION_IS_RW
- board_config_usbc_uf_ppc();
-#endif
+
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
diff --git a/board/quiche/board.h b/board/quiche/board.h
index ad9d57d271..70ed82474c 100644
--- a/board/quiche/board.h
+++ b/board/quiche/board.h
@@ -48,6 +48,7 @@
#include "registers.h"
#define GPIO_DP_HPD GPIO_DDI_MST_IN_HPD
+#define GPIO_USBC_UF_ATTACHED_SRC GPIO_USBC_UF_MUX_VBUS_EN
#define GPIO_TRIGGER_1 GPIO_TP41
#define GPIO_TRIGGER_2 GPIO_TP73