honeybuns: P1 changes (gingerbread/quiche)

This CL updates both quiche and gingerbread to P1 hardware level. This
includes an MCU with 256 kB flash, some GPIO pin assignments to
address EXTi conflicts, and removing the I2C2 port.

BUG=b:183288657
BRANCH=None
TEST=make BOARD=quiche and make BOARD=gingerbread

Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I6a5d3d365b6c9ed704ced8506fa4a97ca7b668c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699454
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>

4 files changed, 29 insertions, 20 deletions

diff --git a/board/quiche/board.c b/board/quiche/board.c
index 69ca1e91a0..ce70a87e4d 100644
--- a/board/quiche/board.c
+++ b/board/quiche/board.c
@@ -55,16 +55,16 @@ static void ppc_interrupt(enum gpio_signal signal)
 const struct power_seq board_power_seq[] = {
 	{GPIO_EN_AC_JACK,               1, 20},
 	{GPIO_EN_PP5000_A,              1, 31},
-	{GPIO_EN_PP3300_B,              1, 100},
+	{GPIO_MST_LP_CTL_L,             1, 0},
+	{GPIO_EN_PP3300_B,              1, 1},
+	{GPIO_EN_PP1100_A,              1, 100+30},
 	{GPIO_EN_BB,                    1, 30},
-	{GPIO_EN_PP1100_A,              1, 30},
 	{GPIO_EN_PP1050_A,              1, 30},
 	{GPIO_EN_PP1200_A,              1, 20},
 	{GPIO_EN_PP5000_C,              1, 20},
 	{GPIO_EN_PP5000_HSPORT,         1, 31},
 	{GPIO_EN_DP_SINK,               1, 80},
-	{GPIO_MST_RST_L,                1, 20},
-	{GPIO_MST_LP_CTL_L,             1, 41},
+	{GPIO_MST_RST_L,                1, 61},
 	{GPIO_EC_HUB2_RESET_L,          1, 41},
 	{GPIO_EC_HUB3_RESET_L,          1, 33},
 	{GPIO_DP_SINK_RESET,            1, 100},
@@ -74,9 +74,8 @@ const struct power_seq board_power_seq[] = {
 	{GPIO_DEMUX_DUAL_DP_RESET_N,    1, 100},
 	{GPIO_DEMUX_DP_HDMI_PD_N,       1, 10},
 	{GPIO_DEMUX_DUAL_DP_MODE,       1, 10},
-	{GPIO_DEMUX_DP_HDMI_MODE,       1, 1},
+	{GPIO_DEMUX_DP_HDMI_MODE,       1, 5},
 };
-
 const size_t board_power_seq_count = ARRAY_SIZE(board_power_seq);
 
 /*
diff --git a/board/quiche/board.h b/board/quiche/board.h
index 66bd57af65..960f0e37f0 100644
--- a/board/quiche/board.h
+++ b/board/quiche/board.h
@@ -40,8 +40,8 @@
 
 #include "registers.h"
 
-#define GPIO_TRIGGER_1 GPIO_USB3_A1_CDP_EN
-#define GPIO_TRIGGER_2 GPIO_USB3_A2_CDP_EN
+#define GPIO_TRIGGER_1 GPIO_TP41
+#define GPIO_TRIGGER_2 GPIO_TP73
 
 enum  debug_gpio {
 	TRIGGER_1 = 0,
diff --git a/board/quiche/build.mk b/board/quiche/build.mk
index 3c17e2e83b..1a8ec0d625 100644
--- a/board/quiche/build.mk
+++ b/board/quiche/build.mk
@@ -8,7 +8,7 @@
 
 CHIP:=stm32
 CHIP_FAMILY:=stm32g4
-CHIP_VARIANT:=stm32g431xb
+CHIP_VARIANT:=stm32g473xc
 BASEBOARD:=honeybuns
 
 board-y=board.o
diff --git a/board/quiche/gpio.inc b/board/quiche/gpio.inc
index eb32f55bb0..6b70d3cfc6 100644
--- a/board/quiche/gpio.inc
+++ b/board/quiche/gpio.inc
@@ -10,12 +10,17 @@
 
 #ifdef SECTION_IS_RW
 GPIO_INT(HOST_USBC_PPC_INT_ODL,  PIN(D,  9),      GPIO_INT_FALLING | GPIO_PULL_UP, ppc_interrupt)
+/* TODO (b/183289386): These singals are required for C0 and C1 operation
+ * GPIO_INT(USBC_DP_MUX_ALERT_ODL,  PIN(B,  1),      GPIO_INT_FALLING | GPIO_PULL_UP, tcpc_alert_event)
+ * GPIO_INT(USBC_DP_PPC_INT_ODL,    PIN(E,  7),      GPIO_INT_FALLING | GPIO_PULL_UP, ppc_interrupt)
+ * GPIO_INT(DDI_MST_IN_HPD,         PIN(C,  14),     GPIO_INT_BOTH, hpd_interrupt)
+*/
 #endif
 
 /* Power sequencing signals */
 GPIO(PWR_BTN,                       PIN(A,  0), GPIO_INPUT)
 GPIO(EN_AC_JACK,                    PIN(A,  1), GPIO_OUT_LOW)
-GPIO(EN_BB,                         PIN(A, 10), GPIO_OUT_LOW)
+GPIO(EN_BB,                         PIN(A,  8), GPIO_OUT_LOW)
 GPIO(EN_PP3300_B,                   PIN(B,  2), GPIO_OUT_LOW)
 GPIO(EN_PP5000_A,                   PIN(C,  6), GPIO_OUT_LOW)
 GPIO(EN_PP1200_A,                   PIN(E,  8), GPIO_OUT_LOW)
@@ -27,6 +32,7 @@ GPIO(EN_PP5000_HSPORT,              PIN(D,  0), GPIO_OUT_LOW)
 /* MST Hub signals */
 GPIO(MST_LP_CTL_L,                  PIN(D, 10), GPIO_ODR_LOW)
 GPIO(MST_RST_L,                     PIN(E, 14), GPIO_ODR_LOW)
+GPIO(MST_HUB_LANE_SWITCH,           PIN(C, 15), GPIO_OUT_HIGH)
 
 /* Display Demux signals */
 GPIO(DEMUX_DUAL_DP_MODE,            PIN(B,  0), GPIO_OUT_LOW)
@@ -42,22 +48,26 @@ GPIO(USBC_DP_PD_RST_L,              PIN(E,  9), GPIO_ODR_LOW)
 GPIO(USBC_UF_RESET_L,               PIN(D,  2), GPIO_ODR_LOW)
 
 /* USB Hubs signals */
-GPIO(EC_HUB2_RESET_L,               PIN(C,  5), GPIO_ODR_HIGH)
-GPIO(EC_HUB3_RESET_L,               PIN(C, 10), GPIO_ODR_HIGH)
+GPIO(EC_HUB2_RESET_L,               PIN(C,  5), GPIO_ODR_LOW)
+GPIO(EC_HUB3_RESET_L,               PIN(B, 10), GPIO_ODR_LOW)
 
 /* USB-A Current limit switches, set default to 1.5A */
-
-GPIO(USB3_A1_CDP_EN,                PIN(C,  3), GPIO_OUT_LOW)
-GPIO(USB3_A2_CDP_EN,                PIN(C,  2), GPIO_OUT_LOW)
-GPIO(USB3_A3_CDP_EN,                PIN(C,  0), GPIO_OUT_LOW)
-GPIO(USB3_A4_CDP_EN,                PIN(C,  1), GPIO_OUT_LOW)
+GPIO(TP73,                          PIN(C,  0), GPIO_OUT_LOW)
+GPIO(EC_DFU_MUX_CTRL,               PIN(C,  3), GPIO_OUT_HIGH)
+GPIO(EC_STATUS_LED1,                PIN(C,  1), GPIO_OUT_HIGH)
+GPIO(EC_STATUS_LED2,                PIN(C,  2), GPIO_OUT_HIGH)
 GPIO(USB3_A5_CDP_EN,                PIN(B,  9), GPIO_OUT_LOW)
 GPIO(USB3_A6_CDP_EN,                PIN(C, 13), GPIO_OUT_LOW)
+GPIO(TP41,                          PIN(B, 12), GPIO_OUT_LOW)
 
 /* Write protect */
 GPIO(EC_FLASH_WP_ODL,               PIN(A,  3), GPIO_ODR_HIGH)
 GPIO(EC_WP_L,                       PIN(E, 11), GPIO_INT_BOTH)
 
+/* UART Bus */
+GPIO(EC_UART_TX,                    PIN(C, 10), GPIO_INT_BOTH)
+GPIO(EC_UART_RX,                    PIN(C, 11), GPIO_INT_BOTH)
+
 /*
  * I2C SCL/SDA pins. These will normally be under control of the peripheral from
  * alt fucntion setting below. But if a port gets wedged, the unwedge code uses
@@ -65,11 +75,12 @@ GPIO(EC_WP_L,                       PIN(E, 11), GPIO_INT_BOTH)
  */
 GPIO(EC_I2C1_SCL,                   PIN(A, 15),  GPIO_ODR_HIGH)
 GPIO(EC_I2C1_SDA,                   PIN(B,  7),  GPIO_ODR_HIGH)
-GPIO(EC_I2C2_SDA,                   PIN(A,  8),  GPIO_ODR_HIGH)
-GPIO(EC_I2C2_SCL,                   PIN(A,  9),  GPIO_ODR_HIGH)
 GPIO(EC_I2C3_SCL,                   PIN(C,  8),  GPIO_ODR_HIGH)
 GPIO(EC_I2C3_SDA,                   PIN(C,  9),  GPIO_ODR_HIGH)
 
+/* misc signals */
+GPIO(BOOT0,                         PIN(B,  8),  GPIO_INPUT)
+
 /* Unimplemented signals since we are not an EC */
 UNIMPLEMENTED(ENTERING_RW)
 
@@ -82,7 +93,6 @@ ALTERNATE(PIN_MASK(C, 0x0C00),  7, MODULE_UART,  GPIO_PULL_UP)
  */
 ALTERNATE(PIN_MASK(B, 0x0080),  4, MODULE_I2C,   GPIO_OPEN_DRAIN)
 ALTERNATE(PIN_MASK(A, 0X8000),  4, MODULE_I2C,   GPIO_OPEN_DRAIN)
-ALTERNATE(PIN_MASK(A, 0x0300),  4, MODULE_I2C,   GPIO_OPEN_DRAIN)
 ALTERNATE(PIN_MASK(C, 0x0300),  8, MODULE_I2C,   GPIO_OPEN_DRAIN)
 /* GPIOA4-7: SPI Signals */
 ALTERNATE(PIN_MASK(A, 0x00F0),  5, MODULE_SPI,   0)