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| author | Caveh Jalali <caveh@chromium.org> | 2021-06-01 22:42:28 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-06-03 21:51:02 +0000 |
| commit | 273bdad8ef38e581895111556e1432bdf3201716 (patch) | |
| tree | 6c5bac26007a77cab856346160dece195ded1a28 /board/rainier | |
| parent | 14d69d56632b502821aacf5d772e9cde5c9b083e (diff) | |
| download | chrome-ec-273bdad8ef38e581895111556e1432bdf3201716.tar.gz | |
COIL: Rename MODULE_SPI_MASTER to MODULE_SPI_CONTROLLER
This renames the MODULE_SPI_MASTER to MODULE_SPI_CONTROLLER.
BRANCH=none
BUG=b:181607131
TEST=make buildall passes;
"compare_build.sh -b all" shows no difference
Change-Id: I4d33f57fd82c5b57f111c12387113dc82cebe60b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2932466
Reviewed-by: Craig Hesling <hesling@chromium.org>
Reviewed-by: Harry Cutts <hcutts@chromium.org>
Commit-Queue: Craig Hesling <hesling@chromium.org>
Diffstat (limited to 'board/rainier')
| -rw-r--r-- | board/rainier/board.c | 4 | ||||
| -rw-r--r-- | board/rainier/gpio.inc | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/board/rainier/board.c b/board/rainier/board.c index 1a95addd9d..ecb42f17d2 100644 --- a/board/rainier/board.c +++ b/board/rainier/board.c @@ -191,7 +191,7 @@ int pd_snk_is_vbus_provided(int port) static void board_spi_enable(void) { - gpio_config_module(MODULE_SPI_MASTER, 1); + gpio_config_module(MODULE_SPI_CONTROLLER, 1); /* Enable clocks to SPI2 module */ STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2; @@ -213,7 +213,7 @@ static void board_spi_disable(void) /* Disable clocks to SPI2 module */ STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2; - gpio_config_module(MODULE_SPI_MASTER, 0); + gpio_config_module(MODULE_SPI_CONTROLLER, 0); } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_spi_disable, diff --git a/board/rainier/gpio.inc b/board/rainier/gpio.inc index 65bbfe1d6f..f5a4f360b3 100644 --- a/board/rainier/gpio.inc +++ b/board/rainier/gpio.inc @@ -90,4 +90,4 @@ ALTERNATE(PIN_MASK(B, 0x0038), 0, MODULE_SPI, 0) /* SPI SLAVE CS: PA15 */ ALTERNATE(PIN_MASK(A, 0x8000), 0, MODULE_SPI, 0) /* SPI MASTER: PD1/3/4 */ -ALTERNATE(PIN_MASK(D, 0x001a), 1, MODULE_SPI_MASTER, 0) +ALTERNATE(PIN_MASK(D, 0x001a), 1, MODULE_SPI_CONTROLLER, 0) |