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authorCaveh Jalali <caveh@google.com>2017-08-24 02:15:36 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-08-29 22:08:20 -0700
commitc1e5671e561c82c9532cb29b17fc7cf4061ab20a (patch)
tree22348963ba0441bf7c4f93e1c88d481438c78b3e /board/reef/board.c
parentc191bf9f4d5b4c2e45583820307d95592d2221ba (diff)
downloadchrome-ec-c1e5671e561c82c9532cb29b17fc7cf4061ab20a.tar.gz
anx3429: force chip reset on PD_RESUME
we need to properly restart the anx3429 after a firmware update. simply initializing the chip doesn't seem to get it to reload its firmware - at least not the portion of the chip that implements the firmware version register. so, we explicitly power down and reset the chip before reinitializing it to force it to run the new firmware. the chip also needs a 10ms "off" time so the reset is properly seen by the chip, so i did a light refactoring of the code paths that reset the anx3429. TEST=used 2 different firmware blobs and verified it switches between them during software sync. BRANCH=none BUG=b:35586895 Change-Id: I967898dd906f21bdc5bc4ce9c1dff9f873d198c1 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/631976
Diffstat (limited to 'board/reef/board.c')
-rw-r--r--board/reef/board.c40
1 files changed, 23 insertions, 17 deletions
diff --git a/board/reef/board.c b/board/reef/board.c
index 0e6b01fca2..8abb856141 100644
--- a/board/reef/board.c
+++ b/board/reef/board.c
@@ -306,7 +306,13 @@ const int usb_port_enable[CONFIG_USB_PORT_POWER_SMART_PORT_COUNT] = {
GPIO_USB1_ENABLE,
};
-/* called from anx74xx_set_power_mode() */
+/**
+ * Power on (or off) a single TCPC.
+ * minimum on/off delays are included.
+ *
+ * @param port Port number of TCPC.
+ * @param mode 0: power off, 1: power on.
+ */
void board_set_tcpc_power_mode(int port, int mode)
{
if (port != USB_PD_PORT_ANX74XX)
@@ -315,13 +321,14 @@ void board_set_tcpc_power_mode(int port, int mode)
switch (mode) {
case ANX74XX_NORMAL_MODE:
gpio_set_level(GPIO_EN_USB_TCPC_PWR, 1);
- msleep(10);
+ msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
break;
case ANX74XX_STANDBY_MODE:
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
- msleep(1);
+ msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
gpio_set_level(GPIO_EN_USB_TCPC_PWR, 0);
+ msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
break;
default:
break;
@@ -329,32 +336,31 @@ void board_set_tcpc_power_mode(int port, int mode)
}
/**
- * Reset PD MCU -- currently only called from handle_pending_reboot() in
- * common/power.c just before hard resetting the system. This logic is likely
- * not needed as the PP3300_A rail should be dropped on EC reset.
+ * Reset all system PD/TCPC MCUs -- currently only called from
+ * handle_pending_reboot() in common/power.c just before hard
+ * resetting the system. This logic is likely not needed as the
+ * PP3300_A rail should be dropped on EC reset.
*/
void board_reset_pd_mcu(void)
{
- /* Assert reset to TCPC1 */
+ /* Assert reset to TCPC1 (ps8751) */
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0);
- /* Assert reset to TCPC0 */
- board_set_tcpc_power_mode(0, 0);
-
+ /* Assert reset to TCPC0 (anx3429) */
+ gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
/* TCPC1 (ps8751) requires 1ms reset down assertion */
- msleep(1);
+ msleep(MAX(1, ANX74XX_RST_L_PWR_L_DELAY_MS));
/* Deassert reset to TCPC1 */
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
+ /* Disable TCPC0 power */
+ gpio_set_level(GPIO_EN_USB_TCPC_PWR, 0);
/*
- * TCPC0 requires 10ms reset/power down assertion
- * minus the 1ms for the TCPC1.
+ * anx3429 requires 10ms reset/power down assertion
*/
- msleep(9);
-
- /* Deassert reset to TCPC0 */
- board_set_tcpc_power_mode(0, 1);
+ msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
+ board_set_tcpc_power_mode(USB_PD_PORT_ANX74XX, 1);
}
void board_tcpc_init(void)