diff options
| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2017-01-26 14:09:35 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-02-02 19:09:52 -0800 |
| commit | d536724cf54452ed02b0a627040164365b9d28b4 (patch) | |
| tree | d616105df2a61558294031123924543cc3e0adb2 /board/reef | |
| parent | f08109522dab20b9621489ccf04e98c26c30cd3f (diff) | |
| download | chrome-ec-d536724cf54452ed02b0a627040164365b9d28b4.tar.gz | |
motion_sense: Defer switching the sensors rate if in S3
During shutdown sequence sensor rails can be powered down asynchronously
to the EC hence EC cannot interlock the sensor states with the power down
states. To avoid this issue, defer switching the sensors rate with a
configurable delay if in S3. By the time deferred function is serviced,
if the chipset is in S5 we can back out from switching the sensor rate.
BUG=chrome-os-partner:61489
BRANCH=none
TEST=Manually tested on Electro. Put the device in S5 and observed
no I2C errors printed on EC the console.
Change-Id: I40b75ebbf0d05fafffdfd535962423c3960fafbf
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/433338
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'board/reef')
| -rw-r--r-- | board/reef/board.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/board/reef/board.h b/board/reef/board.h index 035d078fc7..1068ff9799 100644 --- a/board/reef/board.h +++ b/board/reef/board.h @@ -149,6 +149,19 @@ #define CONFIG_WLAN_POWER_ACTIVE_LOW #define WIRELESS_GPIO_WLAN_POWER GPIO_WIRELESS_GPIO_WLAN_POWER +/* + * During shutdown sequence TPS65094x PMIC turns off the sensor rails + * asynchronously to the EC. If we access the sensors when the sensor power + * rails are off we get I2C errors. To avoid this issue, defer switching + * the sensors rate if in S3. By the time deferred function is serviced if + * the chipset is in S5 we can back out from switching the sensor rate. + * + * Time taken by V1P8U rail to go down from S3 is 30ms to 60ms hence defer + * the sensor switching after 60ms. + */ +#undef CONFIG_MOTION_SENSE_SUSPEND_DELAY_US +#define CONFIG_MOTION_SENSE_SUSPEND_DELAY_US (MSEC * 60) + #define CONFIG_FLASH_SIZE 524288 #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q40 /* FIXME: Should be GD25LQ40? */ |