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authorFurquan Shaikh <furquan@google.com>2018-07-25 22:38:11 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-07-27 08:50:53 -0700
commit8f243ce8444e5cf1d98e52849f1e3742db77db7b (patch)
tree13cf4b862f786dd3850944fd4cd9caabf8c092df /board/reef_it8320
parenta7b3c658db84073b0af5e3907515ecac6c93589a (diff)
downloadchrome-ec-8f243ce8444e5cf1d98e52849f1e3742db77db7b.tar.gz
espi: Rename CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS
This change renames CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SIGNALS in order to make it clear that this config option indicates that chipset sleep signals (SLP_S3 and SLP_S4) are tranmitted over virtual wires instead of physical lines with eSPI. BUG=b:111859300 BRANCH=None TEST=make -j buildall Change-Id: Iab4423abc9102164d4f43296a279c24355445341 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1151048 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/reef_it8320')
-rw-r--r--board/reef_it8320/gpio.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/reef_it8320/gpio.inc b/board/reef_it8320/gpio.inc
index 6d029c1cde..6c07d19f38 100644
--- a/board/reef_it8320/gpio.inc
+++ b/board/reef_it8320/gpio.inc
@@ -20,7 +20,7 @@ GPIO_INT(PCH_SLP_S0_L, PIN(B, 7), GPIO_INT_BOTH, power_signal_interrupt) /*
#endif
GPIO_INT(SUSPWRNACK, PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt) /* SUSPWRNACK */
GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH, lid_interrupt) /* LID_OPEN */
-#ifndef CONFIG_HOSTCMD_ESPI_VW_SIGNALS
+#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS
GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) /* PLT_RST_L */
#endif
GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */