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author | Keith Short <keithshort@chromium.org> | 2021-08-03 11:58:05 -0600 |
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committer | Commit Bot <commit-bot@chromium.org> | 2021-08-03 21:42:19 +0000 |
commit | 34eabe36d503fc9a3128c3710a19cee8ee5df0bd (patch) | |
tree | 9e92e47dc2f0dcb9759cd6f509cbf8a462867923 /board/reef_mchp/gpio.inc | |
parent | fe82812283a6a4001bddc5aeea9e6b4f184cd17a (diff) | |
download | chrome-ec-34eabe36d503fc9a3128c3710a19cee8ee5df0bd.tar.gz |
COIL: Change host interface option to CONFIG_HOSTCMD_SHI
Update SPI host interface config option for inclusive language.
BUG=b:163885307
BRANCH=none
TEST=compare_build.sh
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I808d5960fa3e746626465bedc626a95e0f0aaa3f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3066271
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Diffstat (limited to 'board/reef_mchp/gpio.inc')
-rw-r--r-- | board/reef_mchp/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/reef_mchp/gpio.inc b/board/reef_mchp/gpio.inc index ff98b4c1b9..0385d82102 100644 --- a/board/reef_mchp/gpio.inc +++ b/board/reef_mchp/gpio.inc @@ -84,7 +84,7 @@ GPIO(EC_I2C_POWER_SCL, PIN(010), GPIO_INPUT) * Pin 57 (SER_IRQ) defaults to LPC mode, but we also have EC_PCH_KB_INT_ODL * (Pin B0) in case it doesn't work (Set CONFIG_KEYBOARD_IRQ_GPIO in this case). * - * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SPS option. + * See also the NO_LPC_ESPI bit in DEVALT1 and the CONFIG_HOSTCMD_SHI option. */ GPIO(PCH_SMI_L, PIN(0227), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ |