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authorDuncan Laurie <dlaurie@chromium.org>2014-12-10 09:55:37 -0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-12-10 20:53:05 +0000
commit36e74004f880a7425c586d2fed4599afbc717fa2 (patch)
tree9c0d7f3fc7ea71b7b42a233651a43f0ce3b677d6 /board/samus/power_sequence.c
parent511a9f31e84863270ce66c1373dc10797687ba26 (diff)
downloadchrome-ec-36e74004f880a7425c586d2fed4599afbc717fa2.tar.gz
samus: Add 10ms delay between SUSP_VR and RSMRST
The power sequence doesn't meet the spec from Intel. We should delay about 10ms between VccSUS3_3 and RSMRST. BUG=chrome-os-partner:34411 BRANCH=samus TEST=build and boot on samus Change-Id: Ib35e9dfdcfa4cfde2440f85fbeae6ee878465949 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/234404 Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'board/samus/power_sequence.c')
-rw-r--r--board/samus/power_sequence.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/board/samus/power_sequence.c b/board/samus/power_sequence.c
index 8a6b8d7b94..ffa8999b0a 100644
--- a/board/samus/power_sequence.c
+++ b/board/samus/power_sequence.c
@@ -276,6 +276,9 @@ enum power_state power_handle_state(enum power_state state)
return POWER_G3;
}
+ /* Add 10ms delay between SUSP_VR and RSMRST */
+ msleep(10);
+
/* Deassert RSMRST# */
gpio_set_level(GPIO_PCH_RSMRST_L, 1);