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authorJonathan Brandmeyer <jbrandmeyer@chromium.org>2018-07-16 15:02:22 -0600
committerchrome-bot <chrome-bot@chromium.org>2018-07-26 04:07:41 -0700
commitdda2f778befed39e449d96b471b94d489ed23d60 (patch)
treefc0db938c092a609fbf47e9758d8f0113e5b0cce /board/samus
parent48113728b689870e6aeda6534d36eeffd3b738b3 (diff)
downloadchrome-ec-dda2f778befed39e449d96b471b94d489ed23d60.tar.gz
reset: Log the reason for AP resets.
Provides a new EC host command 'uptime info' which gathers up some information which may be useful for debugging spurious resets on the AP (was the EC reset recently? Why was the EC reset? If the EC reset the AP, why did it do so?, etc.). Provide ectool support for the same. Example results of `ectool uptimeinfo`: ``` localhost ~ # ectool uptimeinfo EC uptime: 475.368 seconds AP resets since EC boot: 2 Most recent AP reset causes: 315.903: reset: console command 363.507: reset: keyboard warm reboot EC reset flags at last EC boot: reset-pin | sysjump ``` BRANCH=none TEST=Perform some `apreset` commands from the EC console and observe their side-effects via the `ectool uptimeinfo` command on the AP side. Test sequences include no-resets through 5 resets, observing that the ring buffer handling was correct. BUG=b:110788201, b:79529789 Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Change-Id: I0bf29d69de471c64f905ee8aa070b15b4f34f2ba Reviewed-on: https://chromium-review.googlesource.com/1139028 Commit-Ready: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/samus')
-rw-r--r--board/samus/power_sequence.c20
1 files changed, 11 insertions, 9 deletions
diff --git a/board/samus/power_sequence.c b/board/samus/power_sequence.c
index 804d3ef208..717af8577c 100644
--- a/board/samus/power_sequence.c
+++ b/board/samus/power_sequence.c
@@ -65,9 +65,10 @@
static int throttle_cpu; /* Throttle CPU? */
static uint32_t pp5000_in_g3; /* Turn PP5000 on in G3? */
-void chipset_force_shutdown(void)
+void chipset_force_shutdown(enum chipset_shutdown_reason reason)
{
- CPRINTS("%s()", __func__);
+ CPRINTS("%s(%d)", __func__, reason);
+ report_ap_reset(reason);
/*
* Force off. This condition will reset once the state machine
@@ -111,9 +112,10 @@ static void chipset_reset_rtc(void)
udelay(10 * MSEC);
}
-void chipset_reset(void)
+void chipset_reset(enum chipset_reset_reason reason)
{
- CPRINTS("%s", __func__);
+ CPRINTS("%s(%d)", __func__, reason);
+ report_ap_reset(reason);
/*
* Send a RCIN# pulse to the PCH. This just causes it to
@@ -184,7 +186,7 @@ enum power_state power_handle_state(enum power_state state)
/* Check for state transitions */
if (!power_has_signals(IN_PGOOD_S3)) {
/* Required rail went away */
- chipset_force_shutdown();
+ chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
return POWER_S3S5;
} else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 1) {
/* Power up to next state */
@@ -198,7 +200,7 @@ enum power_state power_handle_state(enum power_state state)
case POWER_S0:
if (!power_has_signals(IN_PGOOD_S0)) {
/* Required rail went away */
- chipset_force_shutdown();
+ chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
return POWER_S0S3;
} else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 0) {
/* Power down to next state */
@@ -291,7 +293,7 @@ enum power_state power_handle_state(enum power_state state)
if (power_wait_signals(IN_PGOOD_S3)) {
gpio_set_level(GPIO_PP1800_EN, 0);
gpio_set_level(GPIO_PP1200_EN, 0);
- chipset_force_shutdown();
+ chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT);
return POWER_S5;
}
@@ -338,7 +340,7 @@ enum power_state power_handle_state(enum power_state state)
gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0);
wireless_set_state(WIRELESS_OFF);
gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 1);
- chipset_force_shutdown();
+ chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT);
return POWER_S3;
}
@@ -377,7 +379,7 @@ enum power_state power_handle_state(enum power_state state)
gpio_set_level(GPIO_TOUCHSCREEN_RESET_L, 0);
gpio_set_level(GPIO_PP3300_DSW_GATED_EN, 1);
wireless_set_state(WIRELESS_OFF);
- chipset_force_shutdown();
+ chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT);
return POWER_S3;
}