diff options
author | Alec Berg <alecaberg@chromium.org> | 2014-05-20 09:04:57 -0700 |
---|---|---|
committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-07-28 17:12:15 +0000 |
commit | 3060d32ff96869e978a33b5abe822c57b83825c7 (patch) | |
tree | 62a8553937065455d0f3aa2c0af7ad8626be910f /board/samus_pd/gpio.inc | |
parent | d89d34516c88a69977f6c32bfaf57a6655560356 (diff) | |
download | chrome-ec-3060d32ff96869e978a33b5abe822c57b83825c7.tar.gz |
samus: pd: dual USB-PD port support for samus
Adds dual USB-PD port support for samus. Both ports are in dual-role
and can perform either role.
Both ports work fine when only one of the ports is in use. But,
still having problems with PD errors on the lower priority port (port
0). If you have a charger plugged into port 0, and a type-C USB dongle
plugged into port 1, then port 1 has higher priority, and in the
SRC_DISCONNECTED state, every 1.5 seconds when it sends source cap
packet, we occasionally drop pings on port 0, which results in a
lot of start/stop charging.
BUG=chrome-os-partner:28585
BRANCH=none
TEST=Tested on samus to make sure both ports work when I
plug in a charger and a type-C USB dongle with a pull-down on the CC
line. Tested on plankton and zinger to make sure PD works as expected.
Change-Id: Ie7bde3e258f5cd23a0b82b626c0993a45b0df074
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200750
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Diffstat (limited to 'board/samus_pd/gpio.inc')
-rw-r--r-- | board/samus_pd/gpio.inc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/samus_pd/gpio.inc b/board/samus_pd/gpio.inc index 03480d517f..94381fbcdb 100644 --- a/board/samus_pd/gpio.inc +++ b/board/samus_pd/gpio.inc @@ -6,8 +6,8 @@ */ /* Interrupts */ -GPIO(USB_C0_VBUS_WAKE, E, 6, GPIO_INT_BOTH, vbus_evt) -GPIO(USB_C1_VBUS_WAKE, F, 2, GPIO_INT_BOTH, vbus_evt) +GPIO(USB_C0_VBUS_WAKE, E, 6, GPIO_INT_BOTH, vbus0_evt) +GPIO(USB_C1_VBUS_WAKE, F, 2, GPIO_INT_BOTH, vbus1_evt) GPIO(USB_C0_BC12_INT_L, B, 0, GPIO_INT_FALLING, bc12_evt) GPIO(USB_C1_BC12_INT_L, C, 11, GPIO_INT_FALLING, bc12_evt) GPIO(PCH_SLP_S0_L, C, 14, GPIO_INT_BOTH, pch_evt) @@ -45,10 +45,10 @@ GPIO(USB_C1_TX_CLKIN, B, 13, GPIO_OUT_LOW, NULL) /* Power and muxes control */ GPIO(PPVAR_BOOSTIN_SENSE, C, 1, GPIO_ANALOG, NULL) GPIO(PP3300_USB_PD_EN, A, 8, GPIO_OUT_HIGH, NULL) -GPIO(USB_C0_CHARGE_EN_L, D, 12, GPIO_OUT_LOW, NULL) -GPIO(USB_C1_CHARGE_EN_L, D, 13, GPIO_OUT_HIGH, NULL) +GPIO(USB_C0_CHARGE_EN_L, D, 12, GPIO_OUT_LOW, NULL) +GPIO(USB_C1_CHARGE_EN_L, D, 13, GPIO_OUT_LOW, NULL) GPIO(USB_C0_5V_EN, D, 14, GPIO_OUT_LOW, NULL) -GPIO(USB_C1_5V_EN, D, 15, GPIO_OUT_HIGH, NULL) +GPIO(USB_C1_5V_EN, D, 15, GPIO_OUT_LOW, NULL) GPIO(USB_C0_CC1_VCONN1_EN, D, 8, GPIO_OUT_HIGH, NULL) GPIO(USB_C0_CC2_VCONN1_EN, D, 9, GPIO_OUT_HIGH, NULL) GPIO(USB_C1_CC1_VCONN1_EN, D, 10, GPIO_OUT_HIGH, NULL) @@ -69,7 +69,7 @@ GPIO(USB_C0_SS2_DP_MODE, E, 5, GPIO_OUT_HIGH, NULL) GPIO(USB_C1_SS1_DP_MODE, E, 11, GPIO_OUT_HIGH, NULL) GPIO(USB_C1_SS2_DP_MODE, E, 13, GPIO_OUT_HIGH, NULL) GPIO(USB_C0_DP_MODE_L, E, 8, GPIO_OUT_HIGH, NULL) -GPIO(USB_C1_DP_MODE_L, F, 6, GPIO_OUT_LOW, NULL) +GPIO(USB_C1_DP_MODE_L, F, 6, GPIO_OUT_HIGH, NULL) GPIO(USB_C0_DP_POLARITY, E, 7, GPIO_OUT_HIGH, NULL) GPIO(USB_C1_DP_POLARITY, F, 3, GPIO_OUT_HIGH, NULL) |