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authorNick Sanders <nsanders@chromium.org>2015-12-21 13:55:59 -0800
committerchrome-bot <chrome-bot@chromium.org>2016-03-16 16:19:53 -0700
commitd3a8bd0c36bea7c33caecb72058b769170471fd1 (patch)
tree444cc3a74bae148ecd649edaae081ec5e11754ca /board/servo_micro/board.h
parenta595a9cff1607a2b7290482beb6570fc84fe9bdc (diff)
downloadchrome-ec-d3a8bd0c36bea7c33caecb72058b769170471fd1.tar.gz
servo_micro: add initial servo_micro build
* Update flash_ec to allow flashing servo_micro * Add servo_micro build BUG=chromium:571477 BRANCH=None TEST=updated servod is able to control gpio, gpio extender, SPI flash, ec uart, ap uart on test yoshi Signed-off-by: Nick Sanders <nsanders@google.com> Change-Id: I4d69c83ae581cb41da928a27c39b7152475d7ca8 Reviewed-on: https://chromium-review.googlesource.com/327214 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'board/servo_micro/board.h')
-rw-r--r--board/servo_micro/board.h103
1 files changed, 103 insertions, 0 deletions
diff --git a/board/servo_micro/board.h b/board/servo_micro/board.h
new file mode 100644
index 0000000000..810fecb60a
--- /dev/null
+++ b/board/servo_micro/board.h
@@ -0,0 +1,103 @@
+/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Servo micro configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+/* 48 MHz SYSCLK clock frequency */
+#define CPU_CLOCK 48000000
+
+/* Enable USART1,3,4 and USB streams */
+#define CONFIG_STREAM_USART
+#define CONFIG_STREAM_USART2
+#define CONFIG_STREAM_USART3
+#define CONFIG_STREAM_USART4
+#define CONFIG_STREAM_USB
+#define CONFIG_CMD_USART_INFO
+
+/* The UART console is on USART1 (PA9/PA10) */
+#undef CONFIG_UART_CONSOLE
+#define CONFIG_UART_CONSOLE 1
+
+/* Optional features */
+#define CONFIG_STM_HWTIMER32
+#define CONFIG_HW_CRC
+
+/* USB Configuration */
+#define CONFIG_USB
+#define CONFIG_USB_PID 0x501a
+#define CONFIG_USB_CONSOLE
+
+/* USB interface indexes (use define rather than enum to expand them) */
+#define USB_IFACE_USART4_STREAM 0
+#define USB_IFACE_GPIO 1
+#define USB_IFACE_SPI 2
+#define USB_IFACE_CONSOLE 3
+#define USB_IFACE_I2C 4
+#define USB_IFACE_USART3_STREAM 5
+#define USB_IFACE_USART2_STREAM 6
+#define USB_IFACE_COUNT 7
+
+/* USB endpoint indexes (use define rather than enum to expand them) */
+#define USB_EP_CONTROL 0
+#define USB_EP_USART4_STREAM 1
+#define USB_EP_GPIO 2
+#define USB_EP_SPI 3
+#define USB_EP_CONSOLE 4
+#define USB_EP_I2C 5
+#define USB_EP_USART3_STREAM 6
+#define USB_EP_USART2_STREAM 7
+#define USB_EP_COUNT 8
+
+/* Enable control of GPIOs over USB */
+#define CONFIG_USB_GPIO
+
+/* Enable control of SPI over USB */
+#define CONFIG_USB_SPI
+#define CONFIG_SPI_MASTER
+#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */
+
+/* This is not actually an EC so disable some features. */
+#undef CONFIG_WATCHDOG_HELP
+#undef CONFIG_LID_SWITCH
+
+/* Enable control of I2C over USB */
+#define CONFIG_USB_I2C
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
+#define I2C_PORT_MASTER 0
+
+/*
+ * Allow dangerous commands all the time, since we don't have a write protect
+ * switch.
+ */
+#define CONFIG_SYSTEM_UNLOCKED
+
+#ifndef __ASSEMBLER__
+
+/* Timer selection */
+#define TIM_CLOCK32 2
+
+#include "gpio_signal.h"
+
+/* USB string indexes */
+enum usb_strings {
+ USB_STR_DESC = 0,
+ USB_STR_VENDOR,
+ USB_STR_PRODUCT,
+ USB_STR_SERIALNO,
+ USB_STR_VERSION,
+ USB_STR_USART4_STREAM_NAME,
+ USB_STR_CONSOLE_NAME,
+ USB_STR_USART3_STREAM_NAME,
+ USB_STR_USART2_STREAM_NAME,
+
+ USB_STR_COUNT
+};
+
+#endif /* !__ASSEMBLER__ */
+#endif /* __CROS_EC_BOARD_H */