diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2016-10-18 09:27:34 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-11-09 23:26:30 -0800 |
| commit | b2f14a26b9e5b72486e9a7ad0e232fed269704c2 (patch) | |
| tree | 0bad437caabacc37e80b4756c11c105da9992ebc /board/stm32l476g-eval/gpio.inc | |
| parent | d57ca415774be9bf136d9350b9ca52bb29c0ebfb (diff) | |
| download | chrome-ec-b2f14a26b9e5b72486e9a7ad0e232fed269704c2.tar.gz | |
eCTS: Add nested interrupt test (Low->High)
Add a nested interrupt test to eCTS. Lower priority IRQ is fired,
followed by higher priority IRQ. Handler executions should be nested.
P1 *-----*
/ \
P2 *----* *----*
/ \
task_cts ----* *----
A B C D
BUG=chromium:653195
BRANCH=none
TEST=cts.py -m gpio, interrupt, timer; make buildall
Change-Id: I34dc7b4e819051b9070a11e69d13d6be704f2e5f
Reviewed-on: https://chromium-review.googlesource.com/408797
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'board/stm32l476g-eval/gpio.inc')
| -rw-r--r-- | board/stm32l476g-eval/gpio.inc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/board/stm32l476g-eval/gpio.inc b/board/stm32l476g-eval/gpio.inc index ff896d8da5..9cf5bc0aa4 100644 --- a/board/stm32l476g-eval/gpio.inc +++ b/board/stm32l476g-eval/gpio.inc @@ -28,9 +28,10 @@ ALTERNATE(PIN_MASK(G, 0x0180), GPIO_ALT_F8, MODULE_UART, 0) /* LPUART: PG7/8 */ #ifdef CTS_MODULE /* CTS Signals */ -GPIO(HANDSHAKE_OUTPUT, PIN(D, 2), GPIO_ODR_LOW) -GPIO(HANDSHAKE_INPUT, PIN(C, 12), GPIO_INPUT | GPIO_PULL_UP) +GPIO(HANDSHAKE_OUTPUT, PIN(A, 9), GPIO_ODR_LOW) +GPIO(HANDSHAKE_INPUT, PIN(A, 8), GPIO_INPUT | GPIO_PULL_UP) GPIO(OUTPUT_TEST, PIN(C, 11), GPIO_ODR_LOW) +GPIO(CTS_IRQ2, PIN(C, 12), GPIO_ODR_LOW) #ifdef CTS_MODULE_GPIO GPIO(INPUT_TEST, PIN(C, 10), GPIO_INPUT | GPIO_PULL_UP) #endif |