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| author | Daisuke Nojiri <dnojiri@chromium.org> | 2016-10-03 12:51:52 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-10-05 20:58:20 -0700 |
| commit | 3afd683d683f482f003405c721800e3ba2ccb637 (patch) | |
| tree | 0d4a7a23b273d09cbe46f49f5c41eb56ceb3db2b /board/stm32l476g-eval | |
| parent | 8c22c2dcd7397cddd78e518f808212a0ac86df90 (diff) | |
| download | chrome-ec-3afd683d683f482f003405c721800e3ba2ccb637.tar.gz | |
cts: Add I2C tests for read8/16/32 and write8/16/32
This patch adds tests for i2c_read8/16/32 and i2c_write8/16/32.
BUG=chromium:653183
BRANCH=none
TEST=make buildall. Run cts.py -m i2c for 100kHz with 10k ohms
pull-up registers on SCL and SDA. TH=stm32l476g-eval DUT=nucleo-f072rb.
Change-Id: I8121b1c5dc7542da45141543e35036ef41364c38
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/393331
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'board/stm32l476g-eval')
| -rw-r--r-- | board/stm32l476g-eval/board.c | 8 | ||||
| -rw-r--r-- | board/stm32l476g-eval/board.h | 7 | ||||
| -rw-r--r-- | board/stm32l476g-eval/gpio.inc | 7 |
3 files changed, 21 insertions, 1 deletions
diff --git a/board/stm32l476g-eval/board.c b/board/stm32l476g-eval/board.c index 6a5089a874..2ef46e8bc1 100644 --- a/board/stm32l476g-eval/board.c +++ b/board/stm32l476g-eval/board.c @@ -7,6 +7,7 @@ #include "gpio.h" #include "hooks.h" #include "registers.h" +#include "i2c.h" #ifdef CTS_MODULE /* @@ -29,3 +30,10 @@ void tick_event(void) count++; } DECLARE_HOOK(HOOK_TICK, tick_event, HOOK_PRIO_DEFAULT); + +#ifdef CTS_MODULE_I2C +const struct i2c_port_t i2c_ports[] = { + {"test", STM32_I2C2_PORT, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); +#endif diff --git a/board/stm32l476g-eval/board.h b/board/stm32l476g-eval/board.h index 5cfc5b0870..12a83fc8fb 100644 --- a/board/stm32l476g-eval/board.h +++ b/board/stm32l476g-eval/board.h @@ -29,6 +29,13 @@ /* Optional features */ #define CONFIG_STM_HWTIMER32 +#ifdef CTS_MODULE_I2C +#define CONFIG_I2C +#define CONFIG_I2C_SLAVE +#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR 0x3c +#define I2C_PORT_EC STM32_I2C2_PORT +#endif + /* * Allow dangerous commands all the time, since we don't have a write protect * switch. diff --git a/board/stm32l476g-eval/gpio.inc b/board/stm32l476g-eval/gpio.inc index 85447432c0..ff896d8da5 100644 --- a/board/stm32l476g-eval/gpio.inc +++ b/board/stm32l476g-eval/gpio.inc @@ -34,4 +34,9 @@ GPIO(OUTPUT_TEST, PIN(C, 11), GPIO_ODR_LOW) #ifdef CTS_MODULE_GPIO GPIO(INPUT_TEST, PIN(C, 10), GPIO_INPUT | GPIO_PULL_UP) #endif -#endif + +GPIO(I2C2_SCL, PIN(B, 10), GPIO_ODR_HIGH) /* I2C port 2 SCL */ +GPIO(I2C2_SDA, PIN(B, 11), GPIO_ODR_HIGH) /* I2C port 2 SDA */ + +ALTERNATE(PIN_MASK(B, 0x0C00), GPIO_ALT_F4, MODULE_I2C, GPIO_ODR_HIGH) /* I2C2: PB10/11 */ +#endif
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