diff options
| author | Daisuke Nojiri <dnojiri@chromium.org> | 2016-07-18 15:12:32 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-07-29 15:02:44 -0700 |
| commit | b517067a418e1551f7c70cc32840f10845003934 (patch) | |
| tree | 581f7e1c55fe0a4f29d900b6d880c46cb20a7b97 /board/stm32l476g-eval | |
| parent | 4a72f8f60750ff43c0cffb4735a6279db25c1d67 (diff) | |
| download | chrome-ec-b517067a418e1551f7c70cc32840f10845003934.tar.gz | |
cts: Add timer test
The timer test checks the accuracy of the internal timer. After sync,
DUT and TH start counting down one second. After one second, DUT raises
GPIO level. TH determines whether the test passes or not based on how
much more or less time elapsed than one second, assuming its clock is
calibrated.
This test takes advantage of TH running on a bare chip. If the host
were measuring (instead of TH), the timing would be affected by many
software and hardware layers (e.g. UART drivers on DUT and host,
python interpreter, etc.).
BUG=chromium:624520
BRANCH=none
TEST=cts.py --module timer && cts.py --module gpio && make buildall
Change-Id: I535e7772b4d93f1f5d248506f7ea167429a50174
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/361384
Diffstat (limited to 'board/stm32l476g-eval')
| -rw-r--r-- | board/stm32l476g-eval/board.c | 11 | ||||
| -rw-r--r-- | board/stm32l476g-eval/gpio.inc | 9 |
2 files changed, 20 insertions, 0 deletions
diff --git a/board/stm32l476g-eval/board.c b/board/stm32l476g-eval/board.c index 37ff088090..6a5089a874 100644 --- a/board/stm32l476g-eval/board.c +++ b/board/stm32l476g-eval/board.c @@ -7,6 +7,17 @@ #include "gpio.h" #include "hooks.h" #include "registers.h" + +#ifdef CTS_MODULE +/* + * Dummy interrupt handler. It's supposed to be overwritten by each suite + * if needed. + */ +__attribute__((weak)) void cts_irq(enum gpio_signal signal) +{ +} +#endif + #include "gpio_list.h" void tick_event(void) diff --git a/board/stm32l476g-eval/gpio.inc b/board/stm32l476g-eval/gpio.inc index 4878f3b857..85447432c0 100644 --- a/board/stm32l476g-eval/gpio.inc +++ b/board/stm32l476g-eval/gpio.inc @@ -7,6 +7,13 @@ /* Declare symbolic names for all the GPIOs that we care about. * Note: Those with interrupt handlers must be declared first. */ +#ifdef CTS_MODULE +#ifndef CTS_MODULE_GPIO +/* Overload C10 for notification. Enabled only for non-GPIO suites as + * GPIO tests don't require a separate notification line. */ +GPIO_INT(CTS_NOTIFY, PIN(C, 10), GPIO_INT_FALLING | GPIO_PULL_UP , cts_irq) +#endif +#endif /* Outputs */ GPIO(LED_GREEN, PIN(B, 2), GPIO_OUT_LOW) @@ -24,5 +31,7 @@ ALTERNATE(PIN_MASK(G, 0x0180), GPIO_ALT_F8, MODULE_UART, 0) /* LPUART: PG7/8 */ GPIO(HANDSHAKE_OUTPUT, PIN(D, 2), GPIO_ODR_LOW) GPIO(HANDSHAKE_INPUT, PIN(C, 12), GPIO_INPUT | GPIO_PULL_UP) GPIO(OUTPUT_TEST, PIN(C, 11), GPIO_ODR_LOW) +#ifdef CTS_MODULE_GPIO GPIO(INPUT_TEST, PIN(C, 10), GPIO_INPUT | GPIO_PULL_UP) #endif +#endif |