Strago: Gpio initializations for Braswel Reference Design

BUG=chrome-os-partner:36167
TEST=Tested on Braswel Ref Design
BRANCH=None

Change-Id: I445bae14b9c2c445585312d2c0d79d5cd5f9c1b8
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/263947
Reviewed-by: Shawn N <shawnn@chromium.org>

1 files changed, 95 insertions, 35 deletions

diff --git a/board/strago/gpio.inc b/board/strago/gpio.inc
index d2c1c99fee..410113509b 100644
--- a/board/strago/gpio.inc
+++ b/board/strago/gpio.inc
@@ -5,52 +5,112 @@
  * found in the LICENSE file.
  */
 
-GPIO(POWER_BUTTON_L,    PORT(3),  5, GPIO_INT_BOTH_DSLEEP,                      power_button_interrupt) /* Power button */
 GPIO(LID_OPEN,          PORT(2),  7, GPIO_INT_BOTH_DSLEEP,                      lid_interrupt)          /* Lid switch */
-GPIO(PCH_PWRBTN_L,      PORT(16), 0, GPIO_OUT_HIGH,                             NULL)                   /* Power button output to PCH */
-GPIO(STARTUP_LATCH_SET, PORT(4),  6, GPIO_OUT_HIGH,                             NULL)                   /* To enable power button detection */
-
 GPIO(AC_PRESENT,        PORT(3),  0, GPIO_INT_BOTH_DSLEEP,                      extpower_interrupt)     /* BC_ACOK / EC_ACIN - to know if battery or AC connected */
+GPIO(POWER_BUTTON_L,    PORT(3),  5, GPIO_INT_BOTH_DSLEEP,                      power_button_interrupt) /* Power button */
 GPIO(RSMRST_L_PGOOD,    PORT(6),  3, GPIO_INT_BOTH,                             power_signal_interrupt) /* RSMRST_N_PWRGD from power logic */
-GPIO(PCH_RSMRST_L,      PORT(14), 3, GPIO_OUT_LOW,                              NULL)                   /* RSMRST_N to PCH */
+GPIO(ALL_SYS_PGOOD,     PORT(13), 0, GPIO_INT_BOTH_DSLEEP,                      power_signal_interrupt) /* ALL_SYS_PWRGD from power logic */
 GPIO(PCH_SLP_S4_L,      PORT(20), 0, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP,       power_signal_interrupt) /* SLP_S4# signal from PCH */
 GPIO(PCH_SLP_S3_L,      PORT(20), 6, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP,       power_signal_interrupt) /* SLP_S3# signal from PCH */
-GPIO(ALL_SYS_PGOOD,     PORT(13), 0, GPIO_INT_BOTH_DSLEEP,                      power_signal_interrupt) /* ALL_SYS_PWRGD from power logic */
-GPIO(PCH_SYS_PWROK,     PORT(6),  5, GPIO_OUT_LOW,                              NULL)                   /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */
 
-GPIO(USB3_PWR_EN,       PORT(5),  7, GPIO_OUT_HIGH,                             NULL)                   /* Enable power for USB3 Port */
-GPIO(USB2_PWR_EN,       PORT(3),  6, GPIO_OUT_HIGH,                             NULL)                   /* Enable power for USB2 Port */
-GPIO(USB_CTL1,          PORT(10), 5, GPIO_OUT_HIGH,                             NULL)                   /* USB charging mode control */
+GPIO(KBD_KSO2,          PORT(0),  1, GPIO_KB_OUTPUT_COL2,                       NULL)                   /* Negative edge triggered irq. */
+
 GPIO(USB_ILIM_SEL,      PORT(1),  3, GPIO_OUT_HIGH,                             NULL)                   /* USB current control */
 
-GPIO(KBD_IRQ_L,         PORT(15), 2, GPIO_ODR_HIGH,                             NULL)                   /* Negative edge triggered irq. */
+GPIO(I2C_PORT0_SCL,     PORT(1),  5, GPIO_ODR_HIGH,                             NULL)
+GPIO(I2C_PORT0_SDA,     PORT(1),  6, GPIO_ODR_HIGH,                             NULL)
+GPIO(BOARD_ID2,         PORT(1),  7, GPIO_INPUT | GPIO_PULL_UP,                 NULL)                   /* NC */
+GPIO(I2C_PORT1_SCL,     PORT(2),  2, GPIO_ODR_HIGH,                             NULL)
+GPIO(I2C_PORT1_SDA,     PORT(2),  3, GPIO_ODR_HIGH,                             NULL)
+
+GPIO(PCH_SCI_L,         PORT(2),  6, GPIO_ODR_HIGH,                             NULL)                   /* SCI output */
 
-UNIMPLEMENTED(CPU_PROCHOT)
-UNIMPLEMENTED(PCH_RCIN_L)
+GPIO(VOLUME_UP,         PORT(3),  1, GPIO_INT_FALLING,                          NULL)                   /* Volume up button */
+GPIO(VOLUME_DOWN,       PORT(3),  4, GPIO_INT_FALLING,                          NULL)                   /* Volume down button */
+GPIO(USB2_ENABLE,       PORT(3),  6, GPIO_OUT_HIGH,                             NULL)                   /* Enable power for USB2 Port */
 
+GPIO(ENTERING_RW,       PORT(4),  1, GPIO_OUT_LOW,                              NULL)                   /* Indicate when EC is entering RW code */
 GPIO(PCH_SMI_L,         PORT(4),  4, GPIO_ODR_HIGH,                             NULL)                   /* SMI output */
+GPIO(USB_OC1_L,         PORT(4),  5, GPIO_INT_FALLING,                          NULL)                   /* DB2 BC1.2 over current signal to EC */
+GPIO(DP_USB_C_HPD_Q,    PORT(4),  6, GPIO_OUT_HIGH,                             NULL)                   /* DP hot plug detect from EC to SOC */
+GPIO(PWR_BTN_SELECT,    PORT(4),  7, GPIO_OUT_HIGH,                             NULL)                   /* HIGH in clamshell mode and LOW in tablet mode */
+
+GPIO(OTG_SW_EN,		PORT(5),  0, GPIO_OUT_LOW,	                        NULL)                   /* */
+GPIO(PCH_SUS_STAT_L,    PORT(5),  1, GPIO_INT_FALLING,                          NULL)                   /* Signal to inform EC that SOC is entering low power state */
+GPIO(NC_52,  		PORT(5),  2, GPIO_INPUT | GPIO_PULL_UP,                 NULL)                   /* NC */
+GPIO(TRACKPAD_PWREN,    PORT(5),  3, GPIO_OUT_HIGH,                             NULL)                   /* Enable power for Track Pad */
+GPIO(USB_OC0_L,         PORT(5),  5, GPIO_INT_FALLING,                          NULL)                   /* Over current signal of the BC1.2 charger to EC */
+GPIO(TEMP_SENSOR_1,     PORT(5),  6, GPIO_INPUT,                                NULL)                   /* EC_ADC0 */
+GPIO(TEMP_SENSOR_2,     PORT(5),  7, GPIO_INPUT,                                NULL)                   /* EC_ADC0 */
+
+GPIO(CHGR_PMON,         PORT(6),  0, GPIO_ANALOG,                               NULL)
+GPIO(NC_61,             PORT(6),  1, GPIO_INPUT,                                NULL)                   /* NC */
+GPIO(TEMP_SENSOR_3,     PORT(6),  2, GPIO_INPUT,                                NULL)                   /*  */
+GPIO(USBPD_BST_OFF,     PORT(6),  4, GPIO_OUT_HIGH,                             NULL)                   /* USB PD Boost Enable */
+GPIO(PCH_SYS_PWROK,     PORT(6),  5, GPIO_OUT_LOW,                              NULL)                   /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */
 GPIO(PCH_WAKE_L,        PORT(6),  6, GPIO_ODR_HIGH,                             NULL)                   /* PCH wake pin */
-GPIO(KBD_KSO2,          PORT(10), 1, GPIO_KB_OUTPUT_COL2,                       NULL)                   /* Negative edge triggered irq. */
-GPIO(PVT_CS0,        	PORT(14), 6, GPIO_ODR_HIGH,                             NULL)                   /* SPI PVT Chip select */
-/*
- * Signals which aren't implemented on MEC1322 eval board but we'll
- * emulate anyway, to make it more convenient to debug other code.
- */
-UNIMPLEMENTED(ENTERING_RW) /* EC entering RW code */
-UNIMPLEMENTED(WP_L) /* SPI WP Input */
+GPIO(USB1_ENABLE,       PORT(6),  7, GPIO_OUT_HIGH,                             NULL)                   /* Enable power for USB3 Port */
+
+GPIO(USB_CTL1,          PORT(10), 5, GPIO_OUT_HIGH,                             NULL)                   /* USB charging mode control */
+
+GPIO(PCH_RCIN_L,        PORT(11), 0, GPIO_ODR_HIGH,                             NULL)                   /* Reset line to PCH (for 8042 emulation) */
+GPIO(NC_115,            PORT(11), 5, GPIO_INPUT | GPIO_PULL_UP,                 NULL)                   /* NC */
+
+GPIO(USB_PD_EC_INT,     PORT(12), 2, GPIO_INT_BOTH,                             NULL)                   /* Interrupt from USB PD Controller to EC */
+GPIO(STRAP_L,        	PORT(12), 3, GPIO_OUT_LOW,                              NULL)
+GPIO(PERICOM_INT,    	PORT(12), 4, GPIO_INT_BOTH,                             NULL)                      /* */
+GPIO(GYRO_INT2,         PORT(12), 7, GPIO_INT_FALLING,                          NULL)                   /* Gyro sensor interrupt 2 to EC */
+
+GPIO(EC_PLUG_DETECT,    PORT(13), 2, GPIO_INT_BOTH,                             NULL)
+GPIO(BOARD_ID1,         PORT(15), 4, GPIO_INPUT | GPIO_PULL_UP,                 NULL)                   /* Board Id 1 */
+GPIO(NC_135,            PORT(13), 5, GPIO_INPUT | GPIO_PULL_UP,                 NULL)                   /* NC */
+
+GPIO(THERMAL_PROBE_EN_L,PORT(14), 0, GPIO_OUT_HIGH,                             NULL)
+GPIO(PCH_RSMRST_L,      PORT(14), 3, GPIO_OUT_LOW,                              NULL)                   /* RSMRST_N to PCH */
+GPIO(NC_145,            PORT(14), 5, GPIO_OUT_LOW | GPIO_PULL_UP,               NULL)                   /* NC */
+GPIO(PVT_CS0,           PORT(14), 6, GPIO_ODR_HIGH,                             NULL)                   /* SPI PVT Chip select */
+GPIO(ALS_INT,           PORT(14), 7, GPIO_INT_FALLING,                          NULL)                   /* ALS sensor interrupt to EC */
+
+GPIO(WLAN_OFF_L,        PORT(15), 0, GPIO_ODR_HIGH,                             NULL)                   /* Wireless LAN */
+GPIO(CPU_PROCHOT,       PORT(15), 1, GPIO_OUT_LOW,                              NULL)
+GPIO(KBD_IRQ_L,         PORT(15), 2, GPIO_ODR_HIGH,                             NULL)                   /* Negative edge triggered irq. */
+GPIO(BOARD_ID0,         PORT(15), 4, GPIO_INPUT | GPIO_PULL_UP,		        NULL)                   /* NC */
+GPIO(CORE_PWROK,        PORT(15), 5, GPIO_ODR_HIGH,                             NULL)                   /* CORE_PWR_OK_R */
+GPIO(LID_OPEN2,         PORT(15), 6, GPIO_INT_BOTH_DSLEEP,                      NULL)                   /* LID_OPEN_OUT2_R */
+GPIO(PCH_SUSPWRDNACK,   PORT(15), 7, GPIO_INT_FALLING,                          NULL)                   /* PMC SUSPWRDNACK signal from SOC to EC */
+
+GPIO(PCH_PWRBTN_L,      PORT(16), 0, GPIO_OUT_HIGH,                             NULL)                   /* Power button output to PCH */
+GPIO(GYRO_INT1,         PORT(16), 1, GPIO_INT_FALLING,                          NULL)                   /* Gyro sensor interrupt 1 to EC */
+GPIO(CROSS_BAR_EN_NC,   PORT(16), 3, GPIO_INPUT | GPIO_PULL_UP,                 NULL)                   /* NC */
+
+GPIO(STARTUP_LATCH_SET, PORT(20), 1, GPIO_OUT_HIGH,                             NULL)                   /* Output from EC to POL signal of USB Type C Mux */
+GPIO(EC_BL_DISABLE_L,   PORT(20), 2, GPIO_OUT_HIGH,                             NULL)                   /* EDP backligh disable signal from EC */
+GPIO(SMC_SHUTDOWN,      PORT(20), 3, GPIO_OUT_LOW,                              NULL)                   /* Shutdown signal from EC to power sequencing PLD */
+GPIO(CROSS_BAR_MODE_NC, PORT(20), 4, GPIO_INPUT | GPIO_PULL_UP,                 NULL)                   /* NC */
+
+GPIO(SUSPWRDNACK_SOC_EC,PORT(21), 0, GPIO_OUT_LOW,                              NULL)                   /* SUSPWRDNACK signal from MOIC device to EC */
+GPIO(GPIO_3_EC,         PORT(21), 1, GPIO_OUT_LOW,		                NULL)                   /* Sleep SOIX signal from SOC to EC */
+
+UNIMPLEMENTED(WP_L)
 
 /* Alternate functions GPIO definition */
-ALTERNATE(PORT(16), 0x24,     1, MODULE_UART,          0) 			/* UART0 */
-ALTERNATE(PORT(0),  0x3f,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
-ALTERNATE(PORT(10), 0xdd,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)
-ALTERNATE(PORT(3),  0x04,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
-ALTERNATE(PORT(4),  0x0d,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
-ALTERNATE(PORT(12), 0x60,     2, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
-ALTERNATE(PORT(14), 0x14,     3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)
-ALTERNATE(PORT(1),  0x10,     1, MODULE_LPC,           0)                       /* 14: CLKRUN# */
-ALTERNATE(PORT(11), 0x9e,     1, MODULE_LPC,           0)                       /* 111~114:LAD[0:3],  117:PCI_CLK */
-ALTERNATE(PORT(11), 0x40,     1, MODULE_LPC,           GPIO_INT_BOTH)           /* 116: LRESET# */
-ALTERNATE(PORT(12), 0x01,     1, MODULE_LPC,           0)                       /* 120: LFRAME# */
-ALTERNATE(PORT(5),  0x10,     1, MODULE_SPI,           0)
-ALTERNATE(PORT(16), 0x10,     1, MODULE_SPI,           0)
-ALTERNATE(PORT(15), 0x8,      1, MODULE_SPI,           0)
+ALTERNATE(PORT(16),     0x24,   1,      MODULE_UART,            0)                      /* UART0 */
+ALTERNATE(PORT(1),      0x60,   2,      MODULE_I2C,             GPIO_PULL_UP)           /* I2C0: Battery Charger */
+ALTERNATE(PORT(2),      0x3f,   2,      MODULE_I2C,             GPIO_PULL_UP)           /* I2C1: Temp Sensor / I2C2: SOC / I2C3: VNN */
+ALTERNATE(PORT(0),      0xfc,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_OUTPUT)
+ALTERNATE(PORT(1),      0x03,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_OUTPUT)
+ALTERNATE(PORT(10),     0xd8,   3,      MODULE_KEYBOARD_SCAN,   GPIO_KB_OUTPUT)
+ALTERNATE(PORT(3),  	0x04,   3,	MODULE_KEYBOARD_SCAN, 	GPIO_KB_INPUT)
+ALTERNATE(PORT(4),  	0x0d,   3, 	MODULE_KEYBOARD_SCAN,	GPIO_KB_INPUT)
+ALTERNATE(PORT(12), 	0x60,   2, 	MODULE_KEYBOARD_SCAN, 	GPIO_KB_INPUT)
+ALTERNATE(PORT(14), 	0x14,   3, 	MODULE_KEYBOARD_SCAN, 	GPIO_KB_INPUT)
+ALTERNATE(PORT(1),  	0x10,   1, 	MODULE_LPC,           	0)                       /* 14: CLKRUN# */
+ALTERNATE(PORT(11), 	0x9e,   1, 	MODULE_LPC,           	0)                       /* 111~114:LAD[0:3],  117:PCI_CLK */
+ALTERNATE(PORT(11), 	0x40,   1, 	MODULE_LPC,           	GPIO_INT_BOTH)           /* 116: LRESET# */
+ALTERNATE(PORT(12), 	0x01,   1, 	MODULE_LPC,           	0)                       /* 120: LFRAME# */
+ALTERNATE(PORT(5),  	0x10,   1, 	MODULE_SPI,           	0)
+ALTERNATE(PORT(16), 	0x10,   1, 	MODULE_SPI,           	0)
+ALTERNATE(PORT(15), 	0x08,   1, 	MODULE_SPI,           	0)                      /* 153: CLK */
+ALTERNATE(PORT(13),     0x48,   1,      MODULE_PWM_LED,         GPIO_OPEN_DRAIN)        /* 133: PWM0, 136: PWM1 */
+ALTERNATE(PORT(14),     0x02,   1,      MODULE_PWM_LED,         GPIO_OPEN_DRAIN)        /* 141: PWM3 */
+