diff options
author | li feng <li1.feng@intel.com> | 2015-07-07 13:58:24 -0700 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-14 18:19:38 +0000 |
commit | 578f1889af8d689e55e62d163d7da565528ec817 (patch) | |
tree | 9e972429f00173b847d5660e1ab4a368b09d80b0 /board/strago/gpio.inc | |
parent | 776ea6b1189c5c3fec1489bd4f2a66bb0500b2ce (diff) | |
download | chrome-ec-578f1889af8d689e55e62d163d7da565528ec817.tar.gz |
Strago/Cyan: Change USB power pin name to generic one.
Removed USB enable/disable as it will be handled by
HOOK task as CONFIG_USB_PORT_POWER_SMART is enabled.
BUG=none
TEST=Verified on Acer EVT GPIO USB1_ENABLE and USB2_ENABLE value
changed when state switch between S3 and S5.
BRANCH=none
Change-Id: I85f2047c1a40aebf36743a17d353ff3bc481d867
Signed-off-by: li feng <li1.feng@intel.com>
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/283593
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/strago/gpio.inc')
-rw-r--r-- | board/strago/gpio.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/strago/gpio.inc b/board/strago/gpio.inc index fd78fa7e3b..e08bb7477c 100644 --- a/board/strago/gpio.inc +++ b/board/strago/gpio.inc @@ -46,7 +46,7 @@ GPIO(WP_L, PIN(33), GPIO_INPUT) /* EC_SPI_WP_ME_ #ifndef CONFIG_BUTTON_COUNT GPIO(VOLUME_DOWN, PIN(34), GPIO_INPUT) /* Volume down button */ #endif -GPIO(USB2_PWR_EN, PIN(36), GPIO_OUT_LOW) /* Enable power for USB2 Port */ +GPIO(USB2_ENABLE, PIN(36), GPIO_OUT_LOW) /* Enable power for USB2 Port */ GPIO(ENTERING_RW, PIN(41), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ GPIO(PCH_SMI_L, PIN(44), GPIO_ODR_HIGH) /* SMI output */ @@ -64,7 +64,7 @@ GPIO(EC_ADC0, PIN(61), GPIO_INPUT) /* EC_ADC0 */ GPIO(EC_HIB_L, PIN(64), GPIO_OUT_LOW) /* Set to high before Pseduo G3 */ GPIO(PCH_SYS_PWROK, PIN(65), GPIO_OUT_LOW) /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */ GPIO(PCH_WAKE_L, PIN(66), GPIO_ODR_HIGH) /* PCH wake pin */ -GPIO(USB3_PWR_EN, PIN(67), GPIO_OUT_LOW) /* Enable power for USB3 Port */ +GPIO(USB1_ENABLE, PIN(67), GPIO_OUT_LOW) /* Enable power for USB3 Port */ GPIO(NC_GPIO100, PIN(100), GPIO_INPUT | GPIO_PULL_UP) /* NC */ GPIO(NC_GPIO101, PIN(101), GPIO_INPUT | GPIO_PULL_UP) /* NC */ |