diff options
| author | Nick Sanders <nsanders@chromium.org> | 2016-08-15 13:43:12 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-08-19 14:21:19 -0700 |
| commit | 65ba93af93d5f05cc00a1acaafc2f172f578a722 (patch) | |
| tree | a0f686f6654c4c42138de9f3377c9c92ddce048b /board/sweetberry/board.h | |
| parent | a56aabfc650ebd562d768a9b2fb528ac46f4e540 (diff) | |
| download | chrome-ec-65ba93af93d5f05cc00a1acaafc2f172f578a722.tar.gz | |
sweetberry: add build target for sweetberry
sweetberry is an stm32f446 based power monitoring
board, with 48 channels of INA current sense chips
BUG=chromium:608039
TEST=boots
BRANCH=none
Change-Id: If263bcee3a648ba3605f991999d481b7a0e2a1db
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/370718
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'board/sweetberry/board.h')
| -rw-r--r-- | board/sweetberry/board.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/board/sweetberry/board.h b/board/sweetberry/board.h new file mode 100644 index 0000000000..1b0eddb263 --- /dev/null +++ b/board/sweetberry/board.h @@ -0,0 +1,54 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Sweetberry configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Use external clock */ +#define CONFIG_STM32_CLOCK_HSE_HZ 24000000 + +#define CONFIG_BOARD_POST_GPIO_INIT + +/* Enable console recasting of GPIO type. */ +#define CONFIG_CMD_GPIO_EXTENDED + +/* The UART console can be on flax USART3 (PC10/PC11) */ +/* The UART console can be on header USART4 (PA0/PA1) */ +#undef CONFIG_UART_CONSOLE +#define CONFIG_UART_CONSOLE 4 +#undef CONFIG_UART_TX_BUF_SIZE +#define CONFIG_UART_TX_BUF_SIZE 4096 +/* Don't waste precious DMA channels on console. */ +#undef CONFIG_UART_TX_DMA +#undef CONFIG_UART_RX_DMA + +#define CONFIG_UART_TX_REQ_CH 4 +#define CONFIG_UART_RX_REQ_CH 4 + +/* This is not actually a Chromium EC so disable some features. */ +#undef CONFIG_WATCHDOG_HELP +#undef CONFIG_LID_SWITCH +#undef CONFIG_WATCHDOG + +/* Optional features */ +#define CONFIG_STM_HWTIMER32 + +/* + * Allow dangerous commands all the time, since we don't have a write protect + * switch. + */ +#define CONFIG_SYSTEM_UNLOCKED + +#ifndef __ASSEMBLER__ + +/* Timer selection */ +#define TIM_CLOCK32 5 + +#include "gpio_signal.h" + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BOARD_H */ |