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authorLeifu Zhao <leifu.zhao@intel.com>2020-02-14 10:53:48 +0800
committerCommit Bot <commit-bot@chromium.org>2020-02-27 00:29:05 +0000
commit3f1dc59f201a5e3f52c1f0b6e72c8a166ea8dacf (patch)
treec5a1f3b5ad72d32fb2746c00a67359aac06fcba2 /board/tglrvp_ish
parente225427d2a04449d65fbae72932caa8270f182c7 (diff)
downloadchrome-ec-3f1dc59f201a5e3f52c1f0b6e72c8a166ea8dacf.tar.gz
ish: chip level enablement for ish5.4 PM
Chip level power management enablement for ish5.4. BUG=b:149238813 BRANCH=none TEST=ISH can successfully enter into D0i1/D0i2/D0i3 on tgl rvp. Signed-off-by: Leifu Zhao <leifu.zhao@intel.com> Change-Id: Icc554a68fe57970bcaa7be457f56db34067858d9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2055895 Reviewed-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Auto-Submit: Leifu Zhao <leifu.zhao@intel.corp-partner.google.com>
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