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| author | Wai-Hong Tam <waihong@google.com> | 2020-01-30 10:37:12 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-02-01 01:11:02 +0000 |
| commit | ab88ce1416cfcbf0cd6a81cb16e0890eaef1eff1 (patch) | |
| tree | 7634a5cc6283290a31abf9ab6958737cd79e12db /board/trogdor | |
| parent | c825ad974c4086c282f1f4383a47619f6c0b207d (diff) | |
| download | chrome-ec-ab88ce1416cfcbf0cd6a81cb16e0890eaef1eff1.tar.gz | |
Trogdor: Separate the interrupt handlers of WARM_RESET_L and POWER_GOOD
The original one interrupt handler for two signals will cause a
false-postive for the WARM_RESET_L release case, during a transition
state that POWER_GOOD goes low but WARM_RESET_L is still high.
Use two interrupt handlers for WARM_RESET_L and its pull-up rail
POWER_GOOD. It is clear that what signal triggers the interrupt.
BRANCH=None
BUG=b:148478178
TEST=Called "dut-control warm_reset:on sleep:0.2 warm_reset:off" and
saw the message "Long warm reset ended, cold resetting to restore
sanity" once.
Change-Id: I5a14f91c0dbfacd6a70d01d45f3e8de2b6c6a1cc
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031647
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Tested-by: Alexandru M Stan <amstan@chromium.org>
Diffstat (limited to 'board/trogdor')
| -rw-r--r-- | board/trogdor/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/trogdor/gpio.inc b/board/trogdor/gpio.inc index ed717a99bc..6320f6ce44 100644 --- a/board/trogdor/gpio.inc +++ b/board/trogdor/gpio.inc @@ -36,7 +36,7 @@ GPIO_INT(AP_SUSPEND, PIN(5, 7), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_sign * for not only signalling power_signal_interrupt but also handling the logic * of WARM_RESET_L which is pulled-up by the same rail of POWER_GOOD. */ -GPIO_INT(POWER_GOOD, PIN(5, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN, chipset_warm_reset_interrupt) /* SRC_PP1800_S10A from PMIC */ +GPIO_INT(POWER_GOOD, PIN(5, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN, chipset_power_good_interrupt) /* SRC_PP1800_S10A from PMIC */ GPIO_INT(WARM_RESET_L, PIN(F, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, chipset_warm_reset_interrupt) /* AP warm reset */ GPIO_INT(AP_EC_SPI_CS_L, PIN(5, 3), GPIO_INT_FALLING | GPIO_PULL_DOWN, shi_cs_event) /* EC SPI Chip Select */ |