diff options
author | Steven Jian <steven.jian@intel.com> | 2015-04-01 01:25:42 +0800 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-27 03:58:16 +0000 |
commit | 937cc8a64e5971def21303e7a19a4ad9553e0ace (patch) | |
tree | 321543152e0c4d61e686ca7b92edd0d027bb168b /board/twinkie | |
parent | e216906c9327655d71b8758b7f11c2f744e55018 (diff) | |
download | chrome-ec-937cc8a64e5971def21303e7a19a4ad9553e0ace.tar.gz |
mec1322: Simplify GPIO lists
Our existing GPIO macros use port# / gpio#, but the concept of different
GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros
for chips which do not have distinct GPIO ports.
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b
Signed-off-by: Steven Jian <steven.jian@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/262841
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'board/twinkie')
-rw-r--r-- | board/twinkie/gpio.inc | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/board/twinkie/gpio.inc b/board/twinkie/gpio.inc index 15d76dbb45..07b935fceb 100644 --- a/board/twinkie/gpio.inc +++ b/board/twinkie/gpio.inc @@ -4,43 +4,43 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -GPIO_INT(CC2_ALERT_L, A, 7, GPIO_INT_BOTH | GPIO_PULL_UP, cc2_event) -GPIO_INT(VBUS_ALERT_L, B, 2, GPIO_INT_BOTH | GPIO_PULL_UP, vbus_event) +GPIO_INT(CC2_ALERT_L, PIN(A, 7), GPIO_INT_BOTH | GPIO_PULL_UP, cc2_event) +GPIO_INT(VBUS_ALERT_L, PIN(B, 2), GPIO_INT_BOTH | GPIO_PULL_UP, vbus_event) -GPIO(CC1_EN, A, 0, GPIO_OUT_HIGH) -GPIO(CC1_PD, A, 1, GPIO_ANALOG) -GPIO(CC2_EN, A, 2, GPIO_OUT_HIGH) -GPIO(CC2_PD, A, 3, GPIO_ANALOG) -GPIO(DAC, A, 4, GPIO_ANALOG) -GPIO(CC2_TX_DATA, A, 6, GPIO_OUT_LOW) +GPIO(CC1_EN, PIN(A, 0), GPIO_OUT_HIGH) +GPIO(CC1_PD, PIN(A, 1), GPIO_ANALOG) +GPIO(CC2_EN, PIN(A, 2), GPIO_OUT_HIGH) +GPIO(CC2_PD, PIN(A, 3), GPIO_ANALOG) +GPIO(DAC, PIN(A, 4), GPIO_ANALOG) +GPIO(CC2_TX_DATA, PIN(A, 6), GPIO_OUT_LOW) -GPIO(CC1_RA, A, 8, GPIO_ODR_HIGH) -GPIO(USB_DM, A, 11, GPIO_ANALOG) -GPIO(USB_DP, A, 12, GPIO_ANALOG) -GPIO(CC1_RPUSB, A, 13, GPIO_ODR_HIGH) -GPIO(CC1_RP1A5, A, 14, GPIO_ODR_HIGH) -GPIO(CC1_RP3A0, A, 15, GPIO_ODR_HIGH) -GPIO(CC2_RPUSB, B, 0, GPIO_ODR_HIGH) +GPIO(CC1_RA, PIN(A, 8), GPIO_ODR_HIGH) +GPIO(USB_DM, PIN(A, 11), GPIO_ANALOG) +GPIO(USB_DP, PIN(A, 12), GPIO_ANALOG) +GPIO(CC1_RPUSB, PIN(A, 13), GPIO_ODR_HIGH) +GPIO(CC1_RP1A5, PIN(A, 14), GPIO_ODR_HIGH) +GPIO(CC1_RP3A0, PIN(A, 15), GPIO_ODR_HIGH) +GPIO(CC2_RPUSB, PIN(B, 0), GPIO_ODR_HIGH) -GPIO(CC1_TX_EN, B, 1, GPIO_OUT_LOW) -GPIO(CC2_TX_EN, B, 3, GPIO_OUT_LOW) -GPIO(CC1_TX_DATA, B, 4, GPIO_OUT_LOW) -GPIO(CC1_RD, B, 5, GPIO_ODR_HIGH) -GPIO(I2C_SCL, B, 6, GPIO_INPUT) -GPIO(I2C_SDA, B, 7, GPIO_INPUT) -GPIO(CC2_RD, B, 8, GPIO_ODR_HIGH) -GPIO(LED_G_L, B, 11, GPIO_ODR_HIGH) -GPIO(LED_R_L, B, 13, GPIO_ODR_HIGH) -GPIO(LED_B_L, B, 14, GPIO_ODR_HIGH) -GPIO(CC2_RA, B, 15, GPIO_ODR_HIGH) -GPIO(CC2_RP1A5, C, 14, GPIO_ODR_HIGH) -GPIO(CC2_RP3A0, C, 15, GPIO_ODR_HIGH) +GPIO(CC1_TX_EN, PIN(B, 1), GPIO_OUT_LOW) +GPIO(CC2_TX_EN, PIN(B, 3), GPIO_OUT_LOW) +GPIO(CC1_TX_DATA, PIN(B, 4), GPIO_OUT_LOW) +GPIO(CC1_RD, PIN(B, 5), GPIO_ODR_HIGH) +GPIO(I2C_SCL, PIN(B, 6), GPIO_INPUT) +GPIO(I2C_SDA, PIN(B, 7), GPIO_INPUT) +GPIO(CC2_RD, PIN(B, 8), GPIO_ODR_HIGH) +GPIO(LED_G_L, PIN(B, 11), GPIO_ODR_HIGH) +GPIO(LED_R_L, PIN(B, 13), GPIO_ODR_HIGH) +GPIO(LED_B_L, PIN(B, 14), GPIO_ODR_HIGH) +GPIO(CC2_RA, PIN(B, 15), GPIO_ODR_HIGH) +GPIO(CC2_RP1A5, PIN(C, 14), GPIO_ODR_HIGH) +GPIO(CC2_RP3A0, PIN(C, 15), GPIO_ODR_HIGH) /* Unimplemented signals which we need to emulate for now */ UNIMPLEMENTED(ENTERING_RW) UNIMPLEMENTED(WP_L) -ALTERNATE(A, 0x0020, 0, MODULE_USB_PD, 0) /* SPI1: SCK(PA5) */ -ALTERNATE(B, 0x0200, 2, MODULE_USB_PD, 0) /* TIM17_CH1: PB9 */ -ALTERNATE(A, 0x0600, 1, MODULE_UART, GPIO_PULL_UP) /* USART1: PA9/PA10 */ -ALTERNATE(B, 0x00C0, 1, MODULE_I2C, 0) /* I2C1 MASTER:PB6/7 */ +ALTERNATE(PIN_MASK(A, 0x0020), 0, MODULE_USB_PD, 0) /* SPI1: SCK(PA5) */ +ALTERNATE(PIN_MASK(B, 0x0200), 2, MODULE_USB_PD, 0) /* TIM17_CH1: PB9 */ +ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, GPIO_PULL_UP) /* USART1: PA9/PA10 */ +ALTERNATE(PIN_MASK(B, 0x00C0), 1, MODULE_I2C, 0) /* I2C1 MASTER:PB6/7 */ |