diff options
| author | Abe Levkoy <alevkoy@chromium.org> | 2020-07-30 15:06:35 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-07-31 20:39:31 +0000 |
| commit | 5d59ef5be7e1c7d3f5ed1470fccfd3dbcda167f5 (patch) | |
| tree | bb7bb01db997bc003921dc4dc2e2f416dddbf5b9 /board/voxel/gpio.inc | |
| parent | 982a1f2316218e6d1a174040d5aea217b1b623d2 (diff) | |
| download | chrome-ec-5d59ef5be7e1c7d3f5ed1470fccfd3dbcda167f5.tar.gz | |
voxel: Remove power sequencing
The board/AP can handle power sequencing without EC intervention. This
support was already disabled by default in configuration.
BUG=b:143375057
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I39036ba5022cdf953ccb26f23008c21a99989078
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2330576
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'board/voxel/gpio.inc')
| -rw-r--r-- | board/voxel/gpio.inc | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/board/voxel/gpio.inc b/board/voxel/gpio.inc index defc2b06e9..c24fe6ce8c 100644 --- a/board/voxel/gpio.inc +++ b/board/voxel/gpio.inc @@ -14,11 +14,6 @@ GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) -/* Optional power sequencing interrupts */ -#ifdef VOLTEER_POWER_SEQUENCE -GPIO_INT(CPU_C10_GATE_L, PIN(6, 7), GPIO_INT_BOTH, c10_gate_change) -#endif - /* Power sequencing interrupts */ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) #ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 @@ -57,17 +52,6 @@ GPIO(EN_PPVAR_VCCIN, PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 * /* The EC does not buffer this signal on Volteer. */ UNIMPLEMENTED(PCH_DSW_PWROK) -#ifdef VOLTEER_POWER_SEQUENCE -/* Optional power sequencing signals that are not stuffed by default */ -GPIO(EN_DRAM_VDDQ, PIN(C, 6), GPIO_OUT_LOW) -GPIO(EN_PP1050_STG, PIN(C, 0), GPIO_OUT_LOW) -GPIO(EN_PP5000_USB_AG, PIN(A, 7), GPIO_OUT_LOW) -GPIO(EN_PPVAR_VCCIN_AUX, PIN(8, 1), GPIO_OUT_LOW) -GPIO(EN_PP1050_ST_S0, PIN(3, 4), GPIO_OUT_LOW) -GPIO(EN_VNN_BYPASS, PIN(B, 0), GPIO_OUT_LOW) -GPIO(EN_DRAM_VDD1, PIN(9, 6), GPIO_OUT_LOW) -#endif - /* Other wake sources */ /* * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an |