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| author | Mulin Chao <mlchao@nuvoton.com> | 2018-06-06 18:29:20 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-06-12 21:50:45 -0700 |
| commit | d165b0230060d42919e11477ac65a0d14fd0d6ea (patch) | |
| tree | 3be688d025320e3867cf808294c5c1962b15e12c /board/yorp/gpio.inc | |
| parent | 350dd7d51a2eb9314b1c65c45a4da5db9d73df7d (diff) | |
| download | chrome-ec-d165b0230060d42919e11477ac65a0d14fd0d6ea.tar.gz | |
gpio: fixed GPIO_SEL_1P8V is cleared unexpectedly during i2c unwedging.
For npcx ec, board driver needs to add GPIO_SEL_1P8V flag for SDA/SCL
pins in gpio.inc when i2c port is configured to support low-voltage
mode (1.8V). Npcx gpio driver will set the corresponding bits in
LV_GPIO_CTL register later. But if there is an i2c unwedging mechanism
occurred on those 1.8V i2c port, the bits of LV_GPIO_CTL will be cleared
unexpectedly after unweding is completed. And it also will make ec
consumes more 0.5mA current on each pin since IO is selected to 3.3V.
The root cause is the GPIO flags of SCL/SDA have been changed to
zero only after i2c unweding is done. This CL which solved this issue
includes:
1. Add GPIO_INPUT and GPIO_SEL_1P8V flag in ALTERNATE macro array which
pins belong to 1.8V i2c port.
2. Change type of flags in structure gpio_alt_func from uint16_t to
uint32_t since bit overflow.
BRANCH=none
BUG=b:109884927
TEST=No build errors for npcx7 series. Saving 3.3mW power consumption on
yorp if this patch is applied.
Change-Id: I06eadd5df36c7f69e6741f1dee13c801bac18360
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1089604
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/yorp/gpio.inc')
| -rw-r--r-- | board/yorp/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc index 492c8372d0..0fbdde9f07 100644 --- a/board/yorp/gpio.inc +++ b/board/yorp/gpio.inc @@ -151,6 +151,6 @@ ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* I2C1 SDA */ ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* I2C3 */ ALTERNATE(PIN_MASK(F, 0x0C), 0, MODULE_I2C, 0) /* I2C4 */ -ALTERNATE(PIN_MASK(B, 0x0C), 0, MODULE_I2C, 0) /* I2C7 */ +ALTERNATE(PIN_MASK(B, 0x0C), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* 1.8V I2C7 */ ALTERNATE(PIN_MASK(4, 0x30), 0, MODULE_ADC, 0) /* ADC0-1 */ ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* PWM3: KB_BL_PWM */ |