diff options
author | Jett Rink <jettrink@chromium.org> | 2018-03-08 10:26:52 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-03-09 17:38:47 -0800 |
commit | badc848ab32755f5d156120e35ce8ea2cc419ca5 (patch) | |
tree | 9982cae59a445a6695445e679da252f18a6a5829 /board/yorp/gpio.inc | |
parent | 20e9a125e51a132bffd4ec0020de7da44889379d (diff) | |
download | chrome-ec-badc848ab32755f5d156120e35ce8ea2cc419ca5.tar.gz |
yorp: add USB-C, Power, Charging skeleton code
BRANCH=none
BUG=b:73811887,b:74127309
TEST=none
Change-Id: Iac2d90e63db151d37db871dc33681dc35e9127a5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/955941
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/yorp/gpio.inc')
-rw-r--r-- | board/yorp/gpio.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc index 46401e9ff5..172578c091 100644 --- a/board/yorp/gpio.inc +++ b/board/yorp/gpio.inc @@ -54,6 +54,8 @@ GPIO(PMIC_EN, PIN(D, 7), GPIO_OUT_LOW) /* Enable A Rails via PMIC */ GPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC. All _A rails now up. */ GPIO(PCH_SYS_PWROK, PIN(B, 7), GPIO_OUT_LOW) /* EC_PCH_PWROK. All S0 rails now up. */ +GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT) + /* * PCH_PROCHOT_ODL is primarily for monitoring the PROCHOT# signal which is * normally driven by the PMIC. The EC can also drive this signal in the event |