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| author | Jett Rink <jettrink@chromium.org> | 2018-03-23 09:48:50 -0600 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-03-26 14:41:30 -0700 |
| commit | 9849d847e7e888f9588f9e2d14db19366e0dedac (patch) | |
| tree | 1cbd9a0910e6eb20f33d66c4c6b861453aa3568e /board/yorp/gpio.inc | |
| parent | aac3ae29830d2b647e4ea5c60426a7d5ce153a3b (diff) | |
| download | chrome-ec-9849d847e7e888f9588f9e2d14db19366e0dedac.tar.gz | |
yorp: update virtual wire note for PLT_RST_L
BRANCH=none
BUG=b:74123961
TEST=none
Change-Id: I8d1a810a171685f98c6fe476234ec2e29e7c5854
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/978369
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'board/yorp/gpio.inc')
| -rw-r--r-- | board/yorp/gpio.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc index 26e07e434b..65a69600d0 100644 --- a/board/yorp/gpio.inc +++ b/board/yorp/gpio.inc @@ -41,7 +41,8 @@ GPIO(PCH_SLP_S0_L, PIN(A, 4), GPIO_INPUT) /* SLP_S0_L */ #endif /* - * TODO(b/74123961): Move PLT_RST_L and SYS_RESET_L to virtual wires over eSPI + * PLT_RST_L isn't used since there is a Virtual Wire on eSPI for it. It is here + * only for debugging purposes. */ GPIO(PLT_RST_L, PIN(C, 7), GPIO_INPUT) /* Platform Reset from SoC */ GPIO(SYS_RESET_L, PIN(0, 2), GPIO_ODR_HIGH) /* SYS_RST_ODL */ |