diff options
| author | Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> | 2018-05-25 11:39:11 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-30 01:02:35 -0700 |
| commit | 628c9a924cfde28b2c77707bd71e04cafdf7dc9c (patch) | |
| tree | 2c9a042266d1d6325972dd67e98608ce5ea00e32 /board/yorp/gpio.inc | |
| parent | 3c4a912e67ad0f0635c77ef4a30f07397fb06be7 (diff) | |
| download | chrome-ec-628c9a924cfde28b2c77707bd71e04cafdf7dc9c.tar.gz | |
yorp: enable interrupt for base accel sensor
Configure the accel sensor gpio to interrupt.
Enable CONFIG_ACCEL_INTERRUPTS and CONFIG_ACCEL_FIFO
to activate FIFO mode.
BUG=b:74932344
BRANCH=NONE
TEST=On Yorp board, "accelinfo on 1000" should output
BASE ACCEL values.
Change-Id: Icecbbe604b32b6bd691558d2898896f6d1443f19
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1073645
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/yorp/gpio.inc')
| -rw-r--r-- | board/yorp/gpio.inc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/board/yorp/gpio.inc b/board/yorp/gpio.inc index cc4a387bd9..9f3e3dd35f 100644 --- a/board/yorp/gpio.inc +++ b/board/yorp/gpio.inc @@ -39,8 +39,7 @@ GPIO_INT(ALL_SYS_PGOOD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) /* PM /* Other interrupts */ GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ -/* TODO(b/74932344): Make it as an interrupt after driver supports this */ -GPIO(BASE_SIXAXIS_INT_L, PIN(5, 6), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO_INT(BASE_SIXAXIS_INT_L, PIN(5, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, lsm6dsm_interrupt) GPIO(LID_ACCEL_INT_L, PIN(5, 0), GPIO_INPUT | GPIO_SEL_1P8V) /* Define PCH_SLP_S0_L after all interrupts if CONFIG_POWER_S0IX not defined. */ |