diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2014-04-28 18:12:47 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-04-30 09:42:52 +0000 |
| commit | bc72ea3e17007577cfdb87d068bbc1883a591ad2 (patch) | |
| tree | 466308630c4b83b46d1c11e34d25efd5b5dc2a32 /board/zinger/usb_pd_config.h | |
| parent | 439bfbddedde616c3417163a6c018a606281c17d (diff) | |
| download | chrome-ec-bc72ea3e17007577cfdb87d068bbc1883a591ad2.tar.gz | |
pd: handle plug polarity
Use the plug polarity detected by the ADCs to do the PD communication on
the right CCx line.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28339
TEST=make buildall
on Firefly, plug Zinger connector in both direction and see it can
control it either way.
on Fruitpie, use CC1 or CC2 and see it can communicate on both.
Change-Id: I81cb00f164cb8194fba73b383014e81c37d975e2
Reviewed-on: https://chromium-review.googlesource.com/197520
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'board/zinger/usb_pd_config.h')
| -rw-r--r-- | board/zinger/usb_pd_config.h | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/board/zinger/usb_pd_config.h b/board/zinger/usb_pd_config.h index 0900f51a05..dac4bf2c63 100644 --- a/board/zinger/usb_pd_config.h +++ b/board/zinger/usb_pd_config.h @@ -29,7 +29,7 @@ static inline void spi_enable_clock(void) #define TIM_CCR_IDX 1 /* connect TIM3 CH1 to TIM3_CH2 input */ #define TIM_CCR_CS 2 -#define EXTI_COMP 7 +#define EXTI_COMP_MASK (1 << 7) #define IRQ_COMP STM32_IRQ_EXTI4_15 /* the RX is inverted, triggers on rising edge */ #define EXTI_XTSR STM32_EXTI_RTSR @@ -44,7 +44,7 @@ static inline void pd_set_pins_speed(void) } /* Drive the CC line from the TX block */ -static inline void pd_tx_enable(void) +static inline void pd_tx_enable(int polarity) { /* Drive TX GND on PA4 */ STM32_GPIO_BSRR(GPIO_A) = 1 << (4 + 16 /* Reset */); @@ -53,7 +53,7 @@ static inline void pd_tx_enable(void) } /* Put the TX driver in Hi-Z state */ -static inline void pd_tx_disable(void) +static inline void pd_tx_disable(int polarity) { /* Put TX GND (PA4) in Hi-Z state */ STM32_GPIO_BSRR(GPIO_A) = 1 << 4 /* Set */; @@ -61,6 +61,12 @@ static inline void pd_tx_disable(void) STM32_GPIO_MODER(GPIO_A) &= ~(0x3 << (2*6)); } +/* we know the plug polarity, do the right configuration */ +static inline void pd_select_polarity(int polarity) +{ + /* captive cable : no polarity */ +} + /* Initialize pins used for TX and put them in Hi-Z */ static inline void pd_tx_init(void) { |