diff options
| author | Philip Chen <philipchen@google.com> | 2017-09-10 10:31:19 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-09-27 19:03:03 -0700 |
| commit | 884b790a6560e13975395d1982aa5e6634e7842c (patch) | |
| tree | b97eb50e1ef321787e95e424f53a052cb2a04898 /board/zinger | |
| parent | 49958cf5c229c2719304eef1fc8c0c40e8620ac4 (diff) | |
| download | chrome-ec-884b790a6560e13975395d1982aa5e6634e7842c.tar.gz | |
chip/stm32/clock: Incorporate RTC date register
The current stm32 rtc driver only uses RTC_TR and RTC_SSR.
So we son't be able to use rtc for applications which need
time > 24 hours.
To support such applications, this patch adds operations
for RTC date register (RTC_DR).
BUG=b:63908519
CQ-DEPEND=CL:666985
BRANCH=none
TEST=manually with 'ectool rtcset/rtcset' and '/sys/class/rtc/rtc0',
verify the conversion between calendar time and Unix epoch time works.
Change-Id: Iacd5468502e4417a70880d7239ca5e03353d9469
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/659337
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/zinger')
| -rw-r--r-- | board/zinger/board.h | 7 | ||||
| -rw-r--r-- | board/zinger/runtime.c | 13 |
2 files changed, 7 insertions, 13 deletions
diff --git a/board/zinger/board.h b/board/zinger/board.h index b8480f7328..bad172948d 100644 --- a/board/zinger/board.h +++ b/board/zinger/board.h @@ -124,13 +124,6 @@ int flash_physical_is_permanently_protected(void); uint8_t *flash_hash_rw(void); int is_ro_mode(void); -/* RTC functions */ -void rtc_init(void); -void set_rtc_alarm(uint32_t delay_s, uint32_t delay_us, - uint32_t *rtc, uint32_t *rtcss); -void reset_rtc_alarm(uint32_t *rtc, uint32_t *rtcss); -int32_t get_rtc_diff(uint32_t rtc0, uint32_t rtc0ss, - uint32_t rtc1, uint32_t rtc1ss); void __enter_hibernate(uint32_t seconds, uint32_t microseconds); #endif /* !__ASSEMBLER__ */ diff --git a/board/zinger/runtime.c b/board/zinger/runtime.c index 502d6649de..6267100b0c 100644 --- a/board/zinger/runtime.c +++ b/board/zinger/runtime.c @@ -4,6 +4,7 @@ */ /* tiny substitute of the runtime layer */ +#include "chip/stm32/clock-f.h" #include "clock.h" #include "common.h" #include "cpu.h" @@ -90,7 +91,7 @@ void tim2_interrupt(void) } DECLARE_IRQ(STM32_IRQ_TIM2, tim2_interrupt, 1); -static void config_hispeed_clock(void) +static void zinger_config_hispeed_clock(void) { /* Ensure that HSI8 is ON */ if (!(STM32_RCC_CR & (1 << 1))) { @@ -143,7 +144,7 @@ uint32_t task_wait_event(int timeout_us) { uint32_t evt; timestamp_t t0, t1; - uint32_t rtc0, rtc0ss, rtc1, rtc1ss; + struct rtc_time_reg rtc0, rtc1; int rtc_diff; t1.val = get_time().val + timeout_us; @@ -179,17 +180,17 @@ uint32_t task_wait_event(int timeout_us) CPU_SCB_SYSCTRL |= 0x4; set_rtc_alarm(0, timeout_us - STOP_MODE_LATENCY, - &rtc0, &rtc0ss); + &rtc0); asm volatile("wfi"); CPU_SCB_SYSCTRL &= ~0x4; - config_hispeed_clock(); + zinger_config_hispeed_clock(); /* fast forward timer according to RTC counter */ - reset_rtc_alarm(&rtc1, &rtc1ss); - rtc_diff = get_rtc_diff(rtc0, rtc0ss, rtc1, rtc1ss); + reset_rtc_alarm(&rtc1); + rtc_diff = get_rtc_diff(&rtc0, &rtc1); t0.val = t0.val + rtc_diff; force_time(t0); } |