diff options
author | Diana Z <dzigterman@chromium.org> | 2020-05-20 09:46:27 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-05-21 02:23:40 +0000 |
commit | bf889b296035360369abc13fe7892040079d93a8 (patch) | |
tree | 648cf658e2e3f8db2167bae1b2a8230220c66db5 /board | |
parent | da57dbbd3070915738934da7cb4d2a1c5cffc53b (diff) | |
download | chrome-ec-bf889b296035360369abc13fe7892040079d93a8.tar.gz |
Waddledoo: configure ECH1_PACKET_MODE
This GPIO will be used to communicate with the cr50 when we
enable EFS2.
BRANCH=None
BUG=b:156785199
TEST=make -j buildall, boots on waddledoo
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ia960e1ad6ddd83338570cae133697ed5d4f61597
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2210864
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'board')
-rw-r--r-- | board/waddledoo/gpio.inc | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/board/waddledoo/gpio.inc b/board/waddledoo/gpio.inc index 4593a8807f..1da5624b0a 100644 --- a/board/waddledoo/gpio.inc +++ b/board/waddledoo/gpio.inc @@ -59,14 +59,15 @@ GPIO(EC_SUB_IO_2, PIN(3, 4), GPIO_OUT_LOW) /* Misc Enables */ GPIO(EN_VCCIO_EXT, PIN(6, 1), GPIO_OUT_LOW) /* TODO(b:149775160) - Modify if needed if we ever use this signal. */ -GPIO(EN_VCCST, PIN(A, 7), GPIO_INPUT) -GPIO(EN_PP3300_PEN, PIN(6, 3), GPIO_OUT_LOW) -GPIO(EN_PP3300_A, PIN(0, 3), GPIO_OUT_LOW) -GPIO(EN_PP5000_U, PIN(A, 4), GPIO_OUT_LOW) -GPIO(EN_SLP_Z, PIN(8, 3), GPIO_OUT_LOW) -GPIO(EN_KB_BL, PIN(6, 0), GPIO_OUT_LOW) -GPIO(EN_BL_OD, PIN(D, 3), GPIO_ODR_LOW) -GPIO(IMVP9_PE, PIN(E, 0), GPIO_OUT_LOW) +GPIO(EN_VCCST, PIN(A, 7), GPIO_INPUT) +GPIO(EN_PP3300_PEN, PIN(6, 3), GPIO_OUT_LOW) +GPIO(EN_PP3300_A, PIN(0, 3), GPIO_OUT_LOW) +GPIO(EN_PP5000_U, PIN(A, 4), GPIO_OUT_LOW) +GPIO(EN_SLP_Z, PIN(8, 3), GPIO_OUT_LOW) +GPIO(EN_KB_BL, PIN(6, 0), GPIO_OUT_LOW) +GPIO(EN_BL_OD, PIN(D, 3), GPIO_ODR_LOW) +GPIO(IMVP9_PE, PIN(E, 0), GPIO_OUT_LOW) +GPIO(ECH1_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW) /* Power Sequencing */ GPIO(EC_AP_PSYS, PIN(B, 7), GPIO_OUT_LOW) |