diff options
| author | Archana Patni <archana.patni@intel.com> | 2016-11-08 12:45:40 +0530 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-11-17 16:09:44 -0800 |
| commit | b8406119c2c51acc46c551ef0930c51153657613 (patch) | |
| tree | 7db348bfbc3affa88c6d452f70e7f349674ac642 /board | |
| parent | 82aaccad4022737ba4c21cbeb119d73e51dff5f1 (diff) | |
| download | chrome-ec-b8406119c2c51acc46c551ef0930c51153657613.tar.gz | |
Apollolake: Enter/exit from S0ix based on host commands from kernel
This patch changes the entry/exit model for S0ix from a PCH
SLP_S0 signal based model to a hybrid host event/direct interrupt
model. The kernel will send host events on kernel freeze/thaw exit;
EC will initiate the S0ix entry based on host command and exit via
another host command from kernel.
The assertion of SLP_S0 comes later than HC(suspend) and deasserion
of SLP_S0 comes earlier than HC(resume).
________ ________
SLP_S0 |______________________|
_____ ________
HC |___________________________|
BRANCH=none
BUG=chrome-os-partner:58740
TEST=Build/flash EC and check 'echo freeze > /sys/power/state'
command in OS shell. Verify idle state transitions during display off
and periodic wakes from S0ix do not lead to state transitions in EC.
Change-Id: Ie18c6c2ac8998f59141641567d1d740cd72c2d2e
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Signed-off-by: Archana Patni <archana.patni@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/401072
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board')
| -rw-r--r-- | board/reef/board.c | 1 | ||||
| -rw-r--r-- | board/reef/board.h | 3 | ||||
| -rw-r--r-- | board/reef/gpio.inc | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/board/reef/board.c b/board/reef/board.c index 655a319506..ffa7e65d8d 100644 --- a/board/reef/board.c +++ b/board/reef/board.c @@ -114,7 +114,6 @@ void tablet_mode_interrupt(enum gpio_signal signal) /* power signal list. Must match order of enum power_signal. */ const struct power_signal_info power_signal_list[] = { {GPIO_RSMRST_L_PGOOD, 1, "RSMRST_L"}, - {GPIO_PCH_SLP_S0_L, 1, "PMU_SLP_S0_N"}, {GPIO_PCH_SLP_S3_L, 1, "SLP_S3_DEASSERTED"}, {GPIO_PCH_SLP_S4_L, 1, "SLP_S4_DEASSERTED"}, {GPIO_SUSPWRNACK, 1, "SUSPWRNACK_DEASSERTED"}, diff --git a/board/reef/board.h b/board/reef/board.h index d2c6166ee9..9464976fd9 100644 --- a/board/reef/board.h +++ b/board/reef/board.h @@ -113,6 +113,8 @@ #define CONFIG_POWER_BUTTON #define CONFIG_POWER_BUTTON_X86 #define CONFIG_POWER_COMMON +#define CONFIG_POWER_S0IX +#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE /* EC */ #define CONFIG_ADC @@ -219,7 +221,6 @@ enum pwm_channel { enum power_signal { X86_RSMRST_N = 0, - X86_SLP_S0_N, X86_SLP_S3_N, X86_SLP_S4_N, X86_SUSPWRDNACK, diff --git a/board/reef/gpio.inc b/board/reef/gpio.inc index 8a883251fc..3517fe9b23 100644 --- a/board/reef/gpio.inc +++ b/board/reef/gpio.inc @@ -21,7 +21,6 @@ GPIO_INT(USB_C0_CABLE_DET, PIN(C, 5), GPIO_INT_RISING, anx74xx_cable_det_interru GPIO_INT(PCH_SLP_S4_L, PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S4_L */ GPIO_INT(PCH_SLP_S3_L, PIN(7, 3), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S3_L */ -GPIO_INT(PCH_SLP_S0_L, PIN(7, 5), GPIO_INT_BOTH, power_signal_interrupt) /* SLP_S0_L */ GPIO_INT(SUSPWRNACK, PIN(7, 2), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(RSMRST_L_PGOOD, PIN(6, 0), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_RSMRST_ODL */ GPIO_INT(ALL_SYS_PGOOD, PIN(5, 0), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_PWROK_OD */ @@ -66,6 +65,7 @@ GPIO(EC_I2C_POWER_SCL, PIN(D, 1), GPIO_INPUT) GPIO(PCH_SMI_L, PIN(A, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SMI_ODL */ GPIO(PCH_SCI_L, PIN(A, 7), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_SCI_ODL */ +GPIO(PCH_SLP_S0_L, PIN(7, 5), GPIO_INPUT) /* SLP_S0_L */ /* * BRD_ID1 is a an ADC pin which will be used to measure multiple values. |