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authorTommy Chung <tommy.chung@quanta.corp-partner.google.com>2022-01-06 15:37:48 +0800
committerCommit Bot <commit-bot@chromium.org>2022-01-12 03:07:05 +0000
commit8f7f037b43ecc36dad5efb3f92da8a873564e7c7 (patch)
tree72b87032cd83282f98dcb019ea12bdc29ac5ad2f /board
parent7f399abb0bc6d4e05f8a76d07766ed3352287a1f (diff)
downloadchrome-ec-8f7f037b43ecc36dad5efb3f92da8a873564e7c7.tar.gz
dojo: NVME power sequence control
NVME power should be turned on when system starts up while turned off when shutting down. BUG=b:211528578, b:207744114 BRANCH=none TEST=make sure the NVME power sequence control correct. Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Change-Id: Ida0197d71073984efd4cb78963277b5b5c2eeaf0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3369168 Reviewed-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Diffstat (limited to 'board')
-rw-r--r--board/dojo/board.c17
-rw-r--r--board/dojo/gpio.inc4
2 files changed, 14 insertions, 7 deletions
diff --git a/board/dojo/board.c b/board/dojo/board.c
index 1b1c1541d9..1c7ed8b22f 100644
--- a/board/dojo/board.c
+++ b/board/dojo/board.c
@@ -170,10 +170,17 @@ static void board_init(void)
pwm_enable(PWM_CH_LED2, 0);
board_update_motion_sensor_config();
-
- if (board_get_version() >= 2) {
- gpio_set_flags(GPIO_I2C_H_SCL, GPIO_INPUT | GPIO_PULL_DOWN);
- gpio_set_flags(GPIO_I2C_H_SDA, GPIO_INPUT | GPIO_PULL_DOWN);
- }
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+static void enable_nvme(void)
+{
+ gpio_set_level(GPIO_EN_PP3300_SSD, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_STARTUP, enable_nvme, HOOK_PRIO_DEFAULT);
+
+static void disable_nvme(void)
+{
+ gpio_set_level(GPIO_EN_PP3300_SSD, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, disable_nvme, HOOK_PRIO_DEFAULT);
diff --git a/board/dojo/gpio.inc b/board/dojo/gpio.inc
index 972357b3c9..b463cb0f8e 100644
--- a/board/dojo/gpio.inc
+++ b/board/dojo/gpio.inc
@@ -65,6 +65,7 @@ GPIO(PG_MT6360_ODL, PIN(F, 1), GPIO_INPUT)
GPIO(EN_SLP_Z, PIN(E, 3), GPIO_OUT_LOW)
GPIO(SYS_RST_ODL, PIN(B, 6), GPIO_ODR_LOW)
GPIO(EC_BL_EN_OD, PIN(B, 5), GPIO_ODR_LOW | GPIO_SEL_1P8V)
+GPIO(EN_PP3300_SSD, PIN(H, 1), GPIO_ODR_LOW) /* NVME power sequence control */
/* MKBP event synchronization */
GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_INT_ODL */
@@ -98,8 +99,6 @@ GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) /* I2C_USB_C1_SCL */
GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) /* I2C_USB_C1_SDA */
GPIO(I2C_F_SCL, PIN(A, 4), GPIO_INPUT) /* Rev 2+ I2C_PROG_SCL */
GPIO(I2C_F_SDA, PIN(A, 5), GPIO_INPUT) /* Rev 2+ I2C_PROG_SDA */
-GPIO(I2C_H_SCL, PIN(H, 1), GPIO_INPUT) /* Rev 0,1 I2C_PROG_SCL */
-GPIO(I2C_H_SDA, PIN(H, 2), GPIO_INPUT) /* Rev 0,1 I2C_PROG_SDA */
/* Alternate functions GPIO definitions */
ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A */
@@ -131,6 +130,7 @@ GPIO(NC_GPA1, PIN(A, 1), GPIO_INPUT | GPIO_PULL_DOWN)
GPIO(PWM7, PIN(A, 7), GPIO_INPUT | GPIO_PULL_DOWN)
GPIO(EC_NVME_PLN_ODL, PIN(D, 7), GPIO_INPUT | GPIO_PULL_DOWN)
GPIO(SPI_CLK_GPG6, PIN(G, 6), GPIO_INPUT | GPIO_PULL_UP)
+GPIO(NC_GPH2, PIN(H, 2), GPIO_INPUT | GPIO_PULL_DOWN)
GPIO(PG_NVME_OD, PIN(H, 3), GPIO_INPUT | GPIO_PULL_DOWN)
GPIO(EN_PP2500_NVME_X, PIN(J, 2), GPIO_INPUT | GPIO_PULL_DOWN)
GPIO(EN_PP1200_NVME_X, PIN(J, 3), GPIO_INPUT | GPIO_PULL_DOWN)