gpio: add gpio flags to disable sleep

Add GPIO_SLEEP_DIS_LOW and GPIO_SLEEP_DIS_HIGH to disable sleep when a
gpio with one of those flags is asserted.

GPIO_SLEEP_DIS_LOW disables sleep when the signal is set to 0.
GPIO_SLEEP_DIS_HIGH disables sleep when the signal is set to 1.

This will disable all forms of sleep. The flags can be used for ccd
signals to ensure cr50 doesn't enter sleep while c2d2 or servo micro are
relying on a ccd signal to flash the device.

These flags should not be add to signals used during normal cr50
operation. They disable regular sleep regular sleep so using them will
significantly increase cr50 power consumption.

This change adds GPIO_SLEEP_DIS_HIGH to AP_FLASH_SELECT. I'll add more
signals in followup CLs.

This change also replaces SLEEP_MASK_CHARGING with SLEEP_MASK_GPIO.
Nothing was using SLEEP_MASK_CHARGING.

BUG=b:229974371
TEST=Toggle AP_FLASH_SELECT while the AP is off. Verify cr50 doesn't
enter deep sleep and the gpiocfg and sleepmask output looks ok.

	> gpioset AP_FLASH_SELECT 1
	> gpiocfg
	GPIO0_GPIO1:    read 0 drive 0
	GPIO0_GPIO2:    read 1 drive 1
	GPIO1_GPIO0:    read 0 INT_RISING
	GPIO1_GPIO1:    read 0 INT_HIGH
	GPIO1_GPIO4:    read 0 INT_FALLING
	GPIO1_GPIO5:    read 0 drive 1
	GPIO1_GPIO7:    read 0 INT_RISING
	GPIO1_GPIO8:    read 0 INT_FALLING

	gpio sleepmask: 00001000
	> sleepmask
	sleep mask: 00000008
	> gpioset AP_FLASH_SELECT 0
	> gpiocfg
	GPIO0_GPIO1:    read 0 drive 0
	GPIO0_GPIO2:    read 0 drive 0
	GPIO1_GPIO0:    read 0 INT_RISING
	GPIO1_GPIO1:    read 0 INT_HIGH
	GPIO1_GPIO4:    read 0 INT_FALLING
	GPIO1_GPIO5:    read 0 drive 1
	GPIO1_GPIO7:    read 0 INT_RISING
	GPIO1_GPIO8:    read 0 INT_FALLING

	gpio sleepmask: 00000000
	> sleepmask
	sleep mask: 00000000
	>

Change-Id: I1de35455c5a6702635fb714b14d6791f8e5eb2ed
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3605881
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>

3 files changed, 7 insertions, 4 deletions

diff --git a/board/cr50/board.c b/board/cr50/board.c
index c5c88f82f2..bc19800758 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -593,9 +593,9 @@ DECLARE_IRQ(GC_IRQNUM_PMU_INTR_WAKEUP_INT, pmu_wakeup_interrupt, 1);
 void board_configure_deep_sleep_wakepins(void)
 {
 	/*
-	 * Eventually asserting AP_FLASH_SELECT will disable deep sleep. Until
-	 * that's enabled make sure cr50 doesn't enter deep sleep with
-	 * AP_FLASH_SELECT asserted.
+	 * The AP_FLASH_SELECT gpio disables sleep when it's asserted, so it
+	 * shouldn't be possible to get here with it asserted.
+	 * Deassert it just to be safe.
 	 */
 	if (board_has_ec_cr50_comm_support())
 		gpio_set_level(GPIO_AP_FLASH_SELECT, 0);
diff --git a/board/cr50/board.h b/board/cr50/board.h
index a0586256d8..828b2d7d3d 100644
--- a/board/cr50/board.h
+++ b/board/cr50/board.h
@@ -48,6 +48,8 @@
 
 /* Enable getting gpio flags to tell if open drain pins are asserted */
 #define CONFIG_GPIO_GET_EXTENDED
+/* Disable sleep when gpios with GPIO_SLEEP_DIS flags are asserted. */
+#define CONFIG_GPIO_DISABLE_SLEEP
 
 /* Flash configuration */
 #undef CONFIG_FLASH_PSTATE
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc
index 12ed576291..d224189042 100644
--- a/board/cr50/gpio.inc
+++ b/board/cr50/gpio.inc
@@ -154,8 +154,9 @@ GPIO(EC_FLASH_SELECT, PIN(0, 1), GPIO_OUT_LOW)
 /*
  * If this gpio is changed, you must update the AP_FLASH_SELECT pinmux
  * setup in board.c accordingly.
+ * Disable sleep when the signal is set high.
  */
-GPIO(AP_FLASH_SELECT, PIN(0, 2), GPIO_OUT_LOW)
+GPIO(AP_FLASH_SELECT, PIN(0, 2), GPIO_OUT_LOW | GPIO_SLEEP_DIS_HIGH)
 
 /*
  * Pull this low to reset the AP. (We reset the EC with the RBOX.)