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authorVincent Palatin <vpalatin@chromium.org>2012-05-01 09:10:14 -0700
committerVincent Palatin <vpalatin@chromium.org>2012-05-01 22:59:51 +0000
commit539c397fb16460561aa451d121041ed36c13a845 (patch)
treefd31a40a7e1e373262ef04d392d5742fe584ae83 /board
parent285fa08d10c2e5fce6e0db6f217a83b5a42e8004 (diff)
downloadchrome-ec-539c397fb16460561aa451d121041ed36c13a845.tar.gz
introducing chip variant for stm32 family [1/3]
just rename STM32L to STM32. Most of the STM32L15x code is common with STM32F1xx. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:9057 TEST=make BOARD=daisy ; make BOARD=adv ; make BOARD=discovery Change-Id: I819eff5fcd23deff57f5f6dedcf37e6c421b96c2
Diffstat (limited to 'board')
-rw-r--r--board/adv/board.c4
-rw-r--r--board/adv/build.mk2
-rw-r--r--board/daisy/board.c30
-rw-r--r--board/daisy/build.mk2
-rw-r--r--board/discovery/board.c6
-rw-r--r--board/discovery/build.mk2
6 files changed, 23 insertions, 23 deletions
diff --git a/board/adv/board.c b/board/adv/board.c
index b0839a39e1..9e3a4ff392 100644
--- a/board/adv/board.c
+++ b/board/adv/board.c
@@ -69,8 +69,8 @@ void configure_board(void)
/* Enable all GPIOs clocks
* TODO: more fine-grained enabling for power saving
*/
- STM32L_RCC_AHBENR |= 0x3f;
- STM32L_RCC_APB2ENR |= 0x01;
+ STM32_RCC_AHBENR |= 0x3f;
+ STM32_RCC_APB2ENR |= 0x01;
/* Select Alternate function for USART2 on pins PA2/PA3 */
gpio_set_alternate_function(GPIO_A, (1<<2) | (1<<3), GPIO_ALT_USART);
diff --git a/board/adv/build.mk b/board/adv/build.mk
index 2f0ebe32af..9a395beb71 100644
--- a/board/adv/build.mk
+++ b/board/adv/build.mk
@@ -5,6 +5,6 @@
# Board specific files build
# the IC is STmicro STM32L151R8H6
-CHIP:=stm32l
+CHIP:=stm32
board-y=board.o
diff --git a/board/daisy/board.c b/board/daisy/board.c
index d16a9535c6..ae1eb29a3e 100644
--- a/board/daisy/board.c
+++ b/board/daisy/board.c
@@ -89,20 +89,20 @@ void configure_board(void)
/* Enable all GPIOs clocks
* TODO: more fine-grained enabling for power saving
*/
- STM32L_RCC_AHBENR |= 0x3f;
+ STM32_RCC_AHBENR |= 0x3f;
/* Required to configure external IRQ lines (SYSCFG_EXTICRn) */
/* FIXME: This seems to break USB download in U-Boot (?!?) */
- STM32L_RCC_APB2ENR |= 1 << 0;
+ STM32_RCC_APB2ENR |= 1 << 0;
/* Enable SPI */
- STM32L_RCC_APB2ENR |= (1<<12);
+ STM32_RCC_APB2ENR |= (1<<12);
/* SPI1 on pins PA4-7 (push-pull, no pullup/down, 10MHz) */
- STM32L_GPIO_PUPDR_OFF(GPIO_A) &= ~((2 << (7 * 2)) |
+ STM32_GPIO_PUPDR_OFF(GPIO_A) &= ~((2 << (7 * 2)) |
(2 << (6 * 2)) |
(2 << (5 * 2)) |
(2 << (4 * 2)));
- STM32L_GPIO_OTYPER_OFF(GPIO_A) &= ~((1 << 7) |
+ STM32_GPIO_OTYPER_OFF(GPIO_A) &= ~((1 << 7) |
(1 << 6) |
(1 << 5) |
(1 << 4));
@@ -110,27 +110,27 @@ void configure_board(void)
(1<<6) |
(1<<5) |
(1<<4), GPIO_ALT_SPI);
- STM32L_GPIO_OSPEEDR_OFF(GPIO_A) |= 0xff00;
+ STM32_GPIO_OSPEEDR_OFF(GPIO_A) |= 0xff00;
/*
* I2C SCL/SDA on PB10-11, bi-directional, no pull-up/down, initialized
* as hi-Z until alt. function is set
*/
- STM32L_GPIO_PUPDR_OFF(GPIO_B) &= ~((3 << (11*2)) | (3 << (10*2)));
- STM32L_GPIO_MODER_OFF(GPIO_B) &= ~((3 << (11*2)) | (3 << (10*2)));
- STM32L_GPIO_MODER_OFF(GPIO_B) |= (1 << (11*2)) | (1 << (10*2));
- STM32L_GPIO_OTYPER_OFF(GPIO_B) |= (1<<11) | (1<<10);
- STM32L_GPIO_BSRR_OFF(GPIO_B) |= (1<<11) | (1<<10);
+ STM32_GPIO_PUPDR_OFF(GPIO_B) &= ~((3 << (11*2)) | (3 << (10*2)));
+ STM32_GPIO_MODER_OFF(GPIO_B) &= ~((3 << (11*2)) | (3 << (10*2)));
+ STM32_GPIO_MODER_OFF(GPIO_B) |= (1 << (11*2)) | (1 << (10*2));
+ STM32_GPIO_OTYPER_OFF(GPIO_B) |= (1<<11) | (1<<10);
+ STM32_GPIO_BSRR_OFF(GPIO_B) |= (1<<11) | (1<<10);
gpio_set_alternate_function(GPIO_B, (1<<11) | (1<<10), GPIO_ALT_I2C);
/* Select Alternate function for USART1 on pins PA9/PA10 */
gpio_set_alternate_function(GPIO_A, (1<<9) | (1<<10), GPIO_ALT_USART);
/* EC_INT is output, open-drain */
- STM32L_GPIO_OTYPER_OFF(GPIO_B) |= (1<<9);
- STM32L_GPIO_PUPDR_OFF(GPIO_B) &= ~(0x3 << (2*9));
- STM32L_GPIO_MODER_OFF(GPIO_B) &= ~(0x3 << (2*9));
- STM32L_GPIO_MODER_OFF(GPIO_B) |= 0x1 << (2*9);
+ STM32_GPIO_OTYPER_OFF(GPIO_B) |= (1<<9);
+ STM32_GPIO_PUPDR_OFF(GPIO_B) &= ~(0x3 << (2*9));
+ STM32_GPIO_MODER_OFF(GPIO_B) &= ~(0x3 << (2*9));
+ STM32_GPIO_MODER_OFF(GPIO_B) |= 0x1 << (2*9);
/* put GPIO in Hi-Z state */
gpio_set_level(GPIO_EC_INT, 1);
}
diff --git a/board/daisy/build.mk b/board/daisy/build.mk
index 2f0ebe32af..9a395beb71 100644
--- a/board/daisy/build.mk
+++ b/board/daisy/build.mk
@@ -5,6 +5,6 @@
# Board specific files build
# the IC is STmicro STM32L151R8H6
-CHIP:=stm32l
+CHIP:=stm32
board-y=board.o
diff --git a/board/discovery/board.c b/board/discovery/board.c
index 491830164c..c44af27739 100644
--- a/board/discovery/board.c
+++ b/board/discovery/board.c
@@ -53,9 +53,9 @@ void configure_board(void)
* GPIO clocks in low-power (sleep) mode.
* TODO: more fine-grained enabling for power saving
*/
- STM32L_RCC_AHBENR |= 0x3f;
- STM32L_RCC_AHBLPENR |= 0x0e;
- STM32L_RCC_APB2ENR |= 0x01;
+ STM32_RCC_AHBENR |= 0x3f;
+ STM32_RCC_AHBLPENR |= 0x0e;
+ STM32_RCC_APB2ENR |= 0x01;
#if CONFIG_CONSOLE_UART == 1
/* Select Alternate function for USART1 on pins PA9/PA10 */
diff --git a/board/discovery/build.mk b/board/discovery/build.mk
index 2f0ebe32af..9a395beb71 100644
--- a/board/discovery/build.mk
+++ b/board/discovery/build.mk
@@ -5,6 +5,6 @@
# Board specific files build
# the IC is STmicro STM32L151R8H6
-CHIP:=stm32l
+CHIP:=stm32
board-y=board.o