diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 13:26:39 -0600 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-29 18:36:01 +0000 |
commit | a4f1f7ed17ff06608abb56cc053759883f93063e (patch) | |
tree | 084d648472dc55118c8b134f1e48dab225be7464 /board | |
parent | 6fbeefde0e435eb1d7f536f62b323adc36fd0e32 (diff) | |
download | chrome-ec-a4f1f7ed17ff06608abb56cc053759883f93063e.tar.gz |
board/chronicler/usbc_config.c: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: Ibe468d063a9d4f171abd21d71b0bfdec9cc65119
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728149
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'board')
-rw-r--r-- | board/chronicler/usbc_config.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/board/chronicler/usbc_config.c b/board/chronicler/usbc_config.c index c2783dd755..c03f00576b 100644 --- a/board/chronicler/usbc_config.c +++ b/board/chronicler/usbc_config.c @@ -23,7 +23,7 @@ #include "driver/tcpm/tusb422_public.h" #include "driver/tcpm/tcpci.h" -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) +#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ##args) /* * USB3 DB mux configuration - the top level mux still needs to be set to the @@ -124,8 +124,7 @@ static void ps8815_reset(void) int val; gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0); - msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, - PS8815_PWR_H_RST_H_DELAY_MS)); + msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS)); gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1); msleep(PS8815_FW_INIT_DELAY_MS); @@ -136,16 +135,16 @@ static void ps8815_reset(void) CPRINTS("%s: patching ps8815 registers", __func__); - if (i2c_read8(I2C_PORT_USB_C1, - PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == EC_SUCCESS) + if (i2c_read8(I2C_PORT_USB_C1, PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == + EC_SUCCESS) CPRINTS("ps8815: reg 0x0f was %02x", val); - if (i2c_write8(I2C_PORT_USB_C1, - PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, 0x31) == EC_SUCCESS) + if (i2c_write8(I2C_PORT_USB_C1, PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, + 0x31) == EC_SUCCESS) CPRINTS("ps8815: reg 0x0f set to 0x31"); - if (i2c_read8(I2C_PORT_USB_C1, - PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == EC_SUCCESS) + if (i2c_read8(I2C_PORT_USB_C1, PS8XXX_I2C_ADDR1_P2_FLAGS, 0x0f, &val) == + EC_SUCCESS) CPRINTS("ps8815: reg 0x0f now %02x", val); } @@ -207,7 +206,7 @@ void board_reset_pd_mcu(void) /* Daughterboard specific reset for port 1 */ ps8815_reset(); usb_mux_hpd_update(USBC_PORT_C1, USB_PD_MUX_HPD_LVL_DEASSERTED | - USB_PD_MUX_HPD_IRQ_DEASSERTED); + USB_PD_MUX_HPD_IRQ_DEASSERTED); } static void board_tcpc_init(void) |