diff options
| author | Dino Li <Dino.Li@ite.com.tw> | 2017-11-14 10:55:55 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-11-14 21:52:39 -0800 |
| commit | 2bb1811f074db4d33fa22209d4be1b303d93ef04 (patch) | |
| tree | c960bd3feabe48829937dd19fb057570905a69f3 /board | |
| parent | 385c276e4bf50c9a9816b8cf9a8abc9b86dab329 (diff) | |
| download | chrome-ec-2bb1811f074db4d33fa22209d4be1b303d93ef04.tar.gz | |
it83xx: add espi module
Add espi control module for it83xx.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. it8390+Intel SKL-Y RVP3 and boot to shell.
2. console command "kbpress 1 4" to test keyboard data.
(board code for espi module test on CL:392587)
Change-Id: I1b32bd16f7e01abf07b9c9a68ebef2399cc9828d
Reviewed-on: https://chromium-review.googlesource.com/394471
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'board')
| -rw-r--r-- | board/it83xx_evb/gpio.inc | 2 | ||||
| -rw-r--r-- | board/reef_it8320/gpio.inc | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/board/it83xx_evb/gpio.inc b/board/it83xx_evb/gpio.inc index b14cfc8287..96d362e4bd 100644 --- a/board/it83xx_evb/gpio.inc +++ b/board/it83xx_evb/gpio.inc @@ -9,7 +9,9 @@ * Note: Those with interrupt handlers must be declared first. */ GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) +#ifndef CONFIG_ESPI_VW_SIGNALS GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) +#endif GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_PULL_DOWN, lid_interrupt) GPIO_INT(WP_L, PIN(E, 1), GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ #ifdef CONFIG_LOW_POWER_IDLE diff --git a/board/reef_it8320/gpio.inc b/board/reef_it8320/gpio.inc index 5a09785e0d..24b1b7a6ca 100644 --- a/board/reef_it8320/gpio.inc +++ b/board/reef_it8320/gpio.inc @@ -20,7 +20,9 @@ GPIO_INT(PCH_SLP_S0_L, PIN(B, 7), GPIO_INT_BOTH, power_signal_interrupt) /* #endif GPIO_INT(SUSPWRNACK, PIN(E, 1), GPIO_INT_BOTH, power_signal_interrupt) /* SUSPWRNACK */ GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH, lid_interrupt) /* LID_OPEN */ +#ifndef CONFIG_ESPI_VW_SIGNALS GPIO_INT(PCH_PLTRST_L, PIN(E, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lpcrst_interrupt) /* PLT_RST_L */ +#endif GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH, power_button_interrupt) /* MECH_PWR_BTN_ODL */ GPIO_INT(ALL_SYS_PGOOD, PIN(F, 0), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_PWROK_OD */ GPIO_INT(RSMRST_L_PGOOD, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt) /* PMIC_EC_RSMRST_ODL */ |