introducing an unittest of EC-EFS

This patch adds a test case for EC-EFS functions.

BUG=b:150650877
BRANCH=cr50
TEST=make run-ec_comm
make runhosttests
make buildall -j

Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Change-Id: I90cdc3aa73cf8946da4cf094de5ca0adfaaa0a7c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2096338
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>

4 files changed, 77 insertions, 0 deletions

diff --git a/board/host/board.c b/board/host/board.c
index 80ac631d19..cccb6f15ec 100644
--- a/board/host/board.c
+++ b/board/host/board.c
@@ -5,6 +5,7 @@
 /* Emulator board-specific configuration */
 
 #include "button.h"
+#include "ec_comm.h"
 #include "extpower.h"
 #include "gpio.h"
 #include "host_command.h"
@@ -89,3 +90,27 @@ int board_get_entropy(void *buffer, int len)
 	return 1;
 }
 #endif
+
+test_mockable void ccd_update_state(void)
+{
+
+}
+
+test_mockable void ec_comm_packet_mode_en(enum gpio_signal unsed)
+{
+
+}
+
+test_mockable void ec_comm_packet_mode_dis(enum gpio_signal unsed)
+{
+
+}
+
+int board_has_ec_cr50_comm_support(void)
+{
+#ifdef CONFIG_EC_EFS_SUPPORT
+	return 1;
+#else
+	return 0;
+#endif
+}
diff --git a/board/host/board.h b/board/host/board.h
index ad65749c3d..8ccdd40b80 100644
--- a/board/host/board.h
+++ b/board/host/board.h
@@ -77,10 +77,26 @@ enum {
 #define CONFIG_SPI_MASTER
 #define CONFIG_SPI_FP_PORT    1 /* SPI1: third master config */
 
+/* UART indexes (use define rather than enum to expand them) */
+enum {
+	UART_DEFAULT = 0,
+	UART_CR50 = 0,
+	UART_AP = 1,
+	UART_EC = 2,
+	UART_COUNT,
+
+	UART_NULL = 0xff,
+};
+
 #define CONFIG_RNG
 void fps_event(enum gpio_signal signal);
 
 /* Let the tests always check the other NVMEM slot. */
 static inline int board_nvmem_legacy_check_needed(void){ return 1; }
 
+/* Mock functions for EC-CR50 communication test */
+int board_has_ec_cr50_comm_support(void);
+void board_reboot_ec_deferred(int usec_delay);
+void ccd_update_state(void);
+
 #endif /* __CROS_EC_BOARD_H */
diff --git a/board/host/gpio.inc b/board/host/gpio.inc
index 5a08172a07..bf2f974bd3 100644
--- a/board/host/gpio.inc
+++ b/board/host/gpio.inc
@@ -16,6 +16,11 @@ GPIO_INT(VOLUME_UP_L,          PIN(0, 4), GPIO_INT_BOTH, button_interrupt)
 GPIO_INT(CHARGE_DONE,          PIN(0, 5), GPIO_INT_BOTH, inductive_charging_interrupt)
 /* Fingerprint */
 GPIO_INT(FPS_INT,              PIN(0, 14), GPIO_INT_RISING, fps_event)
+/* GPIOs for EC-CR50 communication */
+GPIO_INT(EC_PACKET_MODE_EN,    PIN(0, 16), GPIO_INT_RISING,
+	 ec_comm_packet_mode_en)
+GPIO_INT(EC_PACKET_MODE_DIS,   PIN(0, 17), GPIO_INT_FALLING,
+	 ec_comm_packet_mode_dis)
 
 GPIO(EC_INT_L,             PIN(0, 6), 0)
 GPIO(WP,                   PIN(0, 7), 0)
diff --git a/board/host/tpm_nvmem_ops.h b/board/host/tpm_nvmem_ops.h
new file mode 100644
index 0000000000..f2090f7733
--- /dev/null
+++ b/board/host/tpm_nvmem_ops.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __EC_BOARD_CR50_TPM_NVMEM_OPS_H
+#define __EC_BOARD_CR50_TPM_NVMEM_OPS_H
+
+enum tpm_read_rv {
+	TPM_READ_SUCCESS,
+	TPM_READ_NOT_FOUND,
+	TPM_READ_TOO_SMALL,
+};
+
+enum tpm_write_rv {
+	TPM_WRITE_CREATED,
+	TPM_WRITE_UPDATED,
+	TPM_WRITE_FAIL,
+};
+
+enum tpm_nv_hidden_object {
+	TPM_HIDDEN_U2F_KEK,
+	TPM_HIDDEN_U2F_KH_SALT,
+};
+
+enum tpm_read_rv read_tpm_nvmem(uint16_t object_index,
+				uint16_t object_size,
+				void *obj_value);
+
+#endif  /* ! __EC_BOARD_CR50_TPM_NVMEM_OPS_H */