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| author | Randall Spangler <rspangler@chromium.org> | 2012-05-10 14:52:20 -0700 |
|---|---|---|
| committer | Randall Spangler <rspangler@chromium.org> | 2012-05-10 15:17:01 -0700 |
| commit | f28f2b2e518d50001b03aeffac747e2f17d2917f (patch) | |
| tree | c5c542d4cfe2663d5b5d87eb1ae3d1c5c2f7f64d /board | |
| parent | 8d48971e917b22a98adab4e6c64fdca667b21e26 (diff) | |
| download | chrome-ec-f28f2b2e518d50001b03aeffac747e2f17d2917f.tar.gz | |
Use open drain reset signals, and clean up signals to 5VALW-powered devices
Open drain cleanup minimizes leakage and signal glitching on shared
reset/signal lines, and is tidier than explicitly switching the
signals between inputs/outputs.
Touchscreen and lightbar are powered by +5VALW so their signals need
to be dropped when +5VALW is off to avoid leakage, and so they see a
clean reset signal when they're powered up.
Moved +5VALW power-on to S5-S3 transition, to minimize power draw in
S5. This also ensures that 5VALW-powered devices get reset when the
device bounces through S5. (No effect on proto1, where 5VALW is not
under EC control.)
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:9172
TEST=boot and shutdown system; still works.
Change-Id: Ia4bf0703292a189c324ce283d1e79a33776ee40f
Diffstat (limited to 'board')
| -rw-r--r-- | board/link/board.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/board/link/board.c b/board/link/board.c index 9b01a72b05..7edd10e238 100644 --- a/board/link/board.c +++ b/board/link/board.c @@ -74,8 +74,7 @@ const struct gpio_info gpio_list[GPIO_COUNT] = { {"WRITE_PROTECT", LM4_GPIO_J, (1<<4), GPIO_INT_BOTH, power_button_interrupt}, /* Outputs; all unasserted by default except for reset signals */ - /* CPU_PROCHOTn is high-Z unless we're driving it */ - {"CPU_PROCHOTn", LM4_GPIO_F, (1<<2), 0, NULL}, + {"CPU_PROCHOTn", LM4_GPIO_F, (1<<2), GPIO_HI_Z, NULL}, {"ENABLE_1_5V_DDR", LM4_GPIO_H, (1<<5), GPIO_OUT_LOW, NULL}, {"ENABLE_5VALW", LM4_GPIO_K, (1<<4), GPIO_OUT_LOW, NULL}, {"ENABLE_BACKLIGHT", LM4_GPIO_H, (1<<4), GPIO_OUT_LOW, NULL}, @@ -92,13 +91,11 @@ const struct gpio_info gpio_list[GPIO_COUNT] = { {"PCH_NMIn", LM4_GPIO_M, (1<<2), GPIO_OUT_HIGH, NULL}, {"PCH_PWRBTNn", LM4_GPIO_G, (1<<7), GPIO_OUT_HIGH, NULL}, {"PCH_PWROK", LM4_GPIO_F, (1<<5), GPIO_OUT_LOW, NULL}, - {"PCH_RCINn", LM4_GPIO_Q, (1<<7), GPIO_OUT_LOW, NULL}, + {"PCH_RCINn", LM4_GPIO_Q, (1<<7), GPIO_HI_Z, NULL}, {"PCH_RSMRSTn", LM4_GPIO_F, (1<<1), GPIO_OUT_LOW, NULL}, - /* RTCRST# (and SRTCRST# below) are unasserted by default so we don't - * clear the RTC wells in the PCH when the EC resets. */ - {"PCH_RTCRSTn", LM4_GPIO_F, (1<<6), GPIO_OUT_HIGH, NULL}, + {"PCH_RTCRSTn", LM4_GPIO_F, (1<<6), GPIO_HI_Z, NULL}, {"PCH_SMIn", LM4_GPIO_F, (1<<4), GPIO_OUT_HIGH, NULL}, - {"PCH_SRTCRSTn", LM4_GPIO_C, (1<<7), GPIO_OUT_HIGH, NULL}, + {"PCH_SRTCRSTn", LM4_GPIO_C, (1<<7), GPIO_HI_Z, NULL}, {"PCH_SUSACKn", LM4_GPIO_F, (1<<3), GPIO_OUT_HIGH, NULL}, {"RADIO_ENABLE_WLAN", LM4_GPIO_D, (1<<0), GPIO_OUT_LOW, NULL}, {"RADIO_ENABLE_BT", LM4_GPIO_D, (1<<1), GPIO_OUT_LOW, NULL}, |