cr50: Disable reset triggered by sys_reset until after boot

The EC asserts system reset on init, and Cr50 asserts ec_rst when it is
rebooted. Having the EC and Cr50 keep resetting each other prevents the
system from booting. We only care that Cr50 is restarted when the system
is restarted, so if it gets a system reset call when it is still
initializing everything it is okay to ignore it.

This change expects the EC to do a system reset on init, so it ignores
the first system reset. It will automatically enable the hard resets
two seconds after the board is initialized if it doesn't detect the
initial system reset.

BUG=none
BRANCH=none
TEST=reef and kevin can boot normally. Verify asserting sys_rst_l after
boot resets Cr50 and the rest of the system.

Change-Id: I198208950c526efd3ee0171812de3052785555f2
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/358943
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>

1 files changed, 29 insertions, 1 deletions

diff --git a/board/cr50/board.c b/board/cr50/board.c
index e7995f08a8..4b7333d7dc 100644
--- a/board/cr50/board.c
+++ b/board/cr50/board.c
@@ -48,6 +48,14 @@ uint32_t nvmem_user_sizes[NVMEM_NUM_USERS] = {
 };
 
 /*
+ * When the EC is initialized it asserts SYS_RST_L and when Cr50 is initialized
+ * it resets the EC.  This variable is used to disable the hard reset while Cr50
+ * and the EC are booting to avoid the EC and Cr50 endlessly resetting each
+ * other.
+ */
+static int sys_rst_enabled;
+
+/*
  * There's no way to trigger on both rising and falling edges, so force a
  * compiler error if we try. The workaround is to use the pinmux to connect
  * two GPIOs to the same input and configure each one for a separate edge.
@@ -125,6 +133,13 @@ static void init_runlevel(const enum permission_level desired_level)
 	}
 }
 
+/* Enable HARD RESET when the SYS_RST_L is asserted */
+static void enable_sys_rst(void)
+{
+	sys_rst_enabled = 1;
+}
+DECLARE_DEFERRED(enable_sys_rst);
+
 /* Initialize board. */
 static void board_init(void)
 {
@@ -142,8 +157,15 @@ static void board_init(void)
 
 	/* Indication that firmware is running, for debug purposes. */
 	GREG32(PMU, PWRDN_SCRATCH16) = 0xCAFECAFE;
-}
 
+	/*
+	 * If Cr50 has not already detected a system reset from the EC, then
+	 * enable the HARD RESET after we know the EC is done booting. It will
+	 * be enabled 2 seconds from this call.
+	 */
+	if (!sys_rst_enabled)
+		hook_call_deferred(&enable_sys_rst_data, 2000);
+}
 DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
 
 #if defined(CONFIG_USB)
@@ -215,6 +237,12 @@ void sys_rst_asserted(enum gpio_signal signal)
 	if (ap_spi_update_in_progress())
 		return;
 
+	/* Cr50 should ignore this first sys_rst when the system just reset */
+	if (!sys_rst_enabled) {
+		sys_rst_enabled = 1;
+		return;
+	}
+
 	cflush();
 	system_reset(SYSTEM_RESET_HARD);
 }