diff options
| author | Terry Chen <terry_chen@wistron.corp-partner.google.com> | 2021-09-01 17:56:37 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-09-02 20:08:11 +0000 |
| commit | 02fe1a1cac764a9429ee756da1a457c9f1d5d605 (patch) | |
| tree | e1e7f1bb62459185920853126cd84043600d3fb6 /board | |
| parent | b7acae8fb5137f76494ca32c7786e6f4630195b2 (diff) | |
| download | chrome-ec-02fe1a1cac764a9429ee756da1a457c9f1d5d605.tar.gz | |
primus: Switch GPIOB5 to USB_A_LOW_PWR_OD pin and GPIOB4 to USB_C2_OC_ODL pin
BUG=b:198226222
BRANCH=none
TEST=make -j BOARD=primus
Signed-off-by: Terry Chen <terry_chen@wistron.corp-partner.google.com>
Change-Id: Ibcd2bd8d8fac5efdf6816442ccb9b786dafa4f7e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3134886
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/primus/gpio.inc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/primus/gpio.inc b/board/primus/gpio.inc index 73822eb2d0..4aa00b9ac0 100644 --- a/board/primus/gpio.inc +++ b/board/primus/gpio.inc @@ -70,16 +70,14 @@ GPIO(USB_C0_RT_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(PDEV_STP_N, PIN(9, 6), GPIO_ODR_HIGH) GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) GPIO(USB_C1_RT_RST_ODL, PIN(5, 0), GPIO_ODR_LOW) -GPIO(PAD_FW_RW_EN_N, PIN(B, 5), GPIO_ODR_LOW) -GPIO(TP4_FW_RW_EN_N, PIN(B, 4), GPIO_ODR_LOW) GPIO(USB_C0_FRS_EN, PIN(8, 3), GPIO_OUT_LOW) -GPIO(USB_A_LOW_PWR_OD, PIN(6, 6), GPIO_ODR_LOW) +GPIO(USB_A_LOW_PWR_OD, PIN(B, 5), GPIO_ODR_LOW) GPIO(TBT_PWR_EN, PIN(D, 4), GPIO_OUT_LOW) GPIO(TP4_RESET, PIN(9, 3), GPIO_ODR_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) GPIO(FAN_ID, PIN(4, 1), GPIO_INPUT) GPIO(USB_C0_OC_ODL, PIN(5, 6), GPIO_ODR_HIGH) -GPIO(USB_C1_OC_ODL, PIN(8, 6), GPIO_ODR_HIGH) +GPIO(USB_C1_OC_ODL, PIN(B, 4), GPIO_ODR_HIGH) /* UART alternate functions */ ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* GPIO64/CR_SIN1, GPO65/CR_SOUT1/FLPRG1_L */ @@ -127,6 +125,8 @@ UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */ UNUSED(PIN(8, 1)) /* GPIO81/PECI_DATA */ UNUSED(PIN(3, 2)) /* GPO32/TRIS# */ UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST# */ +UNUSED(PIN(6, 6)) /* GPO66/ARM#_X86 */ +UNUSED(PIN(8, 6)) /* GPIO86/TXD/CR_SOUT2 */ /* Pre-configured PSL balls: J8 K6 */ |