diff options
author | Nadim Taha <ntaha@google.com> | 2016-01-31 23:01:22 -0800 |
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committer | Nadim Taha <ntaha@chromium.org> | 2016-02-01 21:17:22 +0000 |
commit | c8484a91380bc7c4441cdeffac7ede5c387e5d09 (patch) | |
tree | 5b3bba635d5ffd7c375ddb2d541962a9fcc7e0e0 /chip/g/clock.c | |
parent | 9c4f2b00ebeb4076e10a9f2682c5e0acc21a504a (diff) | |
download | chrome-ec-c8484a91380bc7c4441cdeffac7ede5c387e5d09.tar.gz |
Cr50: Fixed soft resets on silicon.
Fixed the peripheral clock enable definitions and enabled the low speed
timers.
BRANCH=none
BUG=none
TEST=Tested soft resets on silicon.
Change-Id: Ie63e5732e5bead174abda89e5c5069b818212e9b
Signed-off-by: Nadim Taha <ntaha@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/324843
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'chip/g/clock.c')
-rw-r--r-- | chip/g/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/g/clock.c b/chip/g/clock.c index d34caf6a29..98d26c5fdb 100644 --- a/chip/g/clock.c +++ b/chip/g/clock.c @@ -9,9 +9,9 @@ void clock_init(void) { - pmu_clock_en(PERIPH_PERI0); pmu_clock_en(PERIPH_TIMEHS0); pmu_clock_en(PERIPH_TIMEHS1); + pmu_clock_en(PERIPH_TIMELS0); pmu_clock_switch_xo(); } |