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| author | Vadim Bendebury <vbendeb@chromium.org> | 2015-09-29 09:49:09 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-29 19:38:22 -0700 |
| commit | b8475a13c068633bea328f311c3b655e1fb9b107 (patch) | |
| tree | ff974f1d547050b5a5865e6f3061b63d09a2cbb6 /chip/g/config_chip.h | |
| parent | ac234f05e0ac34f168805ad186b00ac13c9594fa (diff) | |
| download | chrome-ec-b8475a13c068633bea328f311c3b655e1fb9b107.tar.gz | |
cr50: update to the next fpga revision
This patch upgrades the hardware definition to the latest released
FPGA image, which is reported as follows:
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
m3.0.0> info
IDCODE: 2ba01477
DPCTRL: f0000000
m3.0.0> Note: MD5Sums match: 77e8a79e
m3.0.0> Note: CPU0 halted at @ a76
m3debug serial: 0x0
PROJECT: haven revB1
DATE(yyyymmdd): 20150925
TIME(hhmmss): 21715
XML MD5SUM: 0x77e8a79e
HDR MD5SUM: 0xfd9218ab
P4 last CL: 73753
Xml file name include/havenTop.xml
m3.0.0>
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This latest FPGA image includes a more sophisticated bootrom,
requiring a differently signed firmware image. The signer update is in
the next patch.
BRANCH=none
BUG=chrome-os-partner:43791
TEST=verified that the image boots fine when signed by the updated
signer (which comes in the next patch).
Change-Id: I9a5d8e9e786dfa905619f1c629fe75b82c565490
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302803
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'chip/g/config_chip.h')
| -rw-r--r-- | chip/g/config_chip.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/g/config_chip.h b/chip/g/config_chip.h index 14d5ead8d6..8bef2e687a 100644 --- a/chip/g/config_chip.h +++ b/chip/g/config_chip.h @@ -10,7 +10,7 @@ /* Number of IRQ vectors on the NVIC */ /* TODO_FPGA this should come from the generated .h file */ -#define CONFIG_IRQ_COUNT 188 +#define CONFIG_IRQ_COUNT 192 /* Describe the RAM layout */ #define CONFIG_RAM_BASE 0x10000 |