diff options
| author | Nick Sanders <nsanders@chromium.org> | 2017-02-03 11:54:22 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-05-12 03:25:39 -0700 |
| commit | 8df3b161e946b2b9aaa5e475766864d3fdb2a9ca (patch) | |
| tree | 9bdd6dba80502c56582008c22a2bb78117fd4d0d /chip/g/gpio.c | |
| parent | 44b9f9df83b3c54b46eb09f593cce32fe822f30a (diff) | |
| download | chrome-ec-8df3b161e946b2b9aaa5e475766864d3fdb2a9ca.tar.gz | |
mn50: initial checkin
This firmware supports a board used to initialize firmware on new cr50
parts.
BUG=b:36910757
BRANCH=None
TEST=boots on scribe board, spi/usb/uart/i2c functionality works.
TEST=cr50 boots on reef, CCD EC+AP SPI/UARTS work
Change-Id: I48818225393a6fc0db0c30bc79ad9787de608361
Reviewed-on: https://chromium-review.googlesource.com/437627
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'chip/g/gpio.c')
| -rw-r--r-- | chip/g/gpio.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/chip/g/gpio.c b/chip/g/gpio.c index 122f7f1f24..6f306b78ef 100644 --- a/chip/g/gpio.c +++ b/chip/g/gpio.c @@ -41,6 +41,31 @@ void gpio_set_level(enum gpio_signal signal, int value) set_one_gpio_bit(g->port, g->mask, value); } +int gpio_get_flags_by_mask(uint32_t port, uint32_t mask) +{ + uint32_t flags = 0; + uint32_t val = 0; + + /* Only one bit must be set. */ + if ((mask != (mask & -mask)) || (mask == 0)) + return 0; + + /* Check mode. */ + /* ARM DDI 0479B: 3.5.2 */ + val = GR_GPIO_SETDOUTEN(port) & mask; + if (val) { + flags |= GPIO_OUTPUT; + val = GR_GPIO_DOUT(port) & mask; + if (val) + flags |= GPIO_HIGH; + else + flags |= GPIO_LOW; + } else + flags |= GPIO_INPUT; + + return flags; +} + void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags) { /* Only matters for outputs */ |