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| author | Sheng-Liang Song <ssl@chromium.org> | 2015-03-13 13:20:15 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-03-20 23:06:53 +0000 |
| commit | bdcc496b304ddc7e614de025a08133bbc152ba7f (patch) | |
| tree | 62898e8a6487d454efcf38cad40649a68c249a36 /chip/g/registers.h | |
| parent | 746debdf20a647fbe0e197f8a6c7b0597bc6a27f (diff) | |
| download | chrome-ec-bdcc496b304ddc7e614de025a08133bbc152ba7f.tar.gz | |
cr50: added cr50 a1 chip
cr50_a1 is for cr50 Rev A1 chip.
BUG=chrome-os-partner:33432
BRANCH=none
TEST=Compile Only
Change-Id: I5490d1a5b89fa66c8e8b969cff7538a293a7d053
Signed-off-by: Sheng-Liang Song <ssl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/259847
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'chip/g/registers.h')
| -rw-r--r-- | chip/g/registers.h | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/chip/g/registers.h b/chip/g/registers.h index e549dd091c..36a9f96ac1 100644 --- a/chip/g/registers.h +++ b/chip/g/registers.h @@ -7,9 +7,22 @@ #define __CROS_EC_REGISTERS_H #include "common.h" -#include "gc_regdefs.h" +#if defined(CHIP_VARIANT_CR50_FPGA) +#include "cr50_fpga_regdefs.h" +#define PCLK_FREQ 30000000 +#elif defined(CHIP_VARIANT_CR50_A1) +#include "cr50_a1_regdefs.h" +#define PCLK_FREQ 24000000 +#else +#error "Unsupported CR50 chip variant" +#endif + #include "util.h" +/* Constants for setting baud rate */ +#define DEFAULT_UART_FREQ 1000000 +#define UART_NCO_WIDTH 16 + /* Replace masked bits with val << lsb */ #define REG_WRITE_MLV(reg, mask, lsb, val) reg = ((reg & ~mask) | ((val << lsb) & mask)) |