Cr50: Simplify the API for the SPS driver

The SPS (SPI Slave) driver handles incoming traffic from the SPI
master. This abstracts the basic hardware functions into a clean
API so that the response to the SPI bytes can be put into
separate files.

BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall

If CONFIG_SPI is not defined, incoming SPI traffic is completely ignored.

Even when it's enabled, nothing is reacting to the traffic so
incoming SPI bytes return 0xFF bytes to the master (SPI traffic
is always bidirectional).

Change-Id: I9bbcebc9c5223b942362200fe43a11ac57dfff40
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283581
Reviewed-by: Sheng-liang Song <ssl@chromium.org>

1 files changed, 63 insertions, 0 deletions

diff --git a/chip/g/sps.h b/chip/g/sps.h
new file mode 100644
index 0000000000..f92d083ae8
--- /dev/null
+++ b/chip/g/sps.h
@@ -0,0 +1,63 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+#ifndef __CROS_EC_SPS_H
+#define __CROS_EC_SPS_H
+
+/*
+ * API for the Cr50 SPS (SPI slave) controller. The controller deploys a 2KB
+ * buffer split evenly between receive and transmit directions.
+ *
+ * Each one kilobyte of memory is organized into a FIFO with read and write
+ * pointers. RX FIFO write and TX FIFO read pointers are managed by hardware.
+ * RX FIFO read and TX FIFO write pointers are managed by software.
+ */
+
+#include <stdint.h>
+#include <stddef.h>
+
+/**
+ * Every RX byte simultaneously sends a TX byte, no matter what. This
+ * specifies the TX byte to send when there's no data in the TX FIFO.
+ *
+ * @param byte	 dummy byte to send (default is 0xFF)
+ */
+void sps_tx_status(uint8_t byte);
+
+/**
+ * Add data to the SPS TX FIFO
+ *
+ * @param data        Pointer to 8-bit data
+ * @param data_size   Number of bytes to transmit
+ * @return            Number of bytes placed into the TX FIFO
+ */
+int sps_transmit(uint8_t *data, size_t data_size);
+
+/**
+ * The RX handler function is called in interrupt context to process incoming
+ * bytes. It is passed a pointer to the linear space in the RX FIFO and the
+ * number of bytes available at that address.
+ *
+ * If the RX FIFO wraps around, the RX FIFO handler may be called twice during
+ * one interrupt.
+ *
+ * The handler is also called when the chip select deasserts, in case any
+ * cleanup is required.
+ */
+typedef void (*rx_handler_fn)(uint8_t *data, size_t data_size, int cs_status);
+
+/**
+ * Register the RX handler function. This will reset and disable the RX FIFO,
+ * replace any previous handler, then enable the RX FIFO.
+ *
+ * @param func        RX handler function
+ */
+void sps_register_rx_handler(rx_handler_fn func);
+
+/**
+ * Unregister the RX handler. This will reset and disable the RX FIFO.
+ */
+void sps_unregister_rx_handler(void);
+
+#endif	/* __CROS_EC_SPS_H */