cr50: CCD V1 controls SPI access

SPI access now depends on CCD_CAP_AP_FLASH and CCD_CAP_EC_FLASH.

usb_spi_state.enabled_host and .enabled_device are now bitfields which
depend on which SPI interface is enabled.  This was implied before by
a single & comparing enabled_host to enabled_device, but is now
explicit so that the device can decide to enable just a subset of
buses.

BUG=b:62537474
BRANCH=cr50
BRANCH=cr50
TEST=manual with CR50_DEV=1
        Connect host PC to dev board USB port
        On host PC:
                sudo servod -c ccd_cr50.xml -c reef_r1_inas.xml

	In test protocol below, (test EC) means this command:
		sudo flashrom -p raiden_debug_spi:target=EC --wp-status

	And (test AP) means this command:
		sudo flashrom -p raiden_debug_spi:target=AP --wp-status

	"pass" means no console warning about "SPI access denied"
	"fail" means console warnings about "SPI access denied"

	To get even more confirmation, in chip/g/usb_spi.c temporarily
	put this debug statement at the end of usb_spi_deferred():
	       CPRINTS("SPI res=%d", (int)res);
	Pass is res=0, fail is res=5.

        ccdoops
	(test AP) --> pass
	(test EC) --> pass

	ccdunlock
	(test AP) --> fail
	(test EC) --> fail

        ccdoops
	ccdset flashap unlesslocked
	ccdunlock
	(test AP) --> pass
	(test EC) --> fail

        ccdoops
	ccdset flashec unlesslocked
	ccdunlock
	(test AP) --> fail
	(test EC) --> pass

Change-Id: I3d37d088b748832f164f2ca0ff29a93d6532ebed
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/590858
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>

1 files changed, 5 insertions, 4 deletions

diff --git a/chip/g/usb_spi.h b/chip/g/usb_spi.h
index 2240999950..b852310f1e 100644
--- a/chip/g/usb_spi.h
+++ b/chip/g/usb_spi.h
@@ -72,12 +72,13 @@ enum usb_spi_request {
 	USB_SPI_REQ_SOCKET          = 0x0007,
 };
 
-/* USB SPI device indexes */
+/* USB SPI device bitmasks */
 enum usb_spi {
 	USB_SPI_DISABLE = 0,
-	USB_SPI_AP,
-	USB_SPI_EC,
-	USB_SPI_H1,
+	USB_SPI_AP = (1 << 0),
+	USB_SPI_EC = (1 << 1),
+	USB_SPI_H1 = (1 << 2),
+	USB_SPI_ALL = USB_SPI_AP | USB_SPI_EC | USB_SPI_H1
 };