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authorRandall Spangler <rspangler@chromium.org>2013-07-17 11:09:58 -0700
committerChromeBot <chrome-bot@google.com>2013-07-18 16:47:00 -0700
commit5691ac816805781a27b5da84cab9c600b77b9dcb (patch)
tree3eebef9a3ee371367b47eae0654c0487ba865fcf /chip/host/config_chip.h
parent7189a9762e1ec8a35dd27e6efc19cd54275eb855 (diff)
downloadchrome-ec-5691ac816805781a27b5da84cab9c600b77b9dcb.tar.gz
Add EC_CMD_GET_FLASH_INFO version 1
This adds two new fields: the ideal write size for best EC flashing performance (e.g., page mode instead of word mode), and a flags field with a flag to indicate whether the EC erases its bits to 0 or 1. The EC still supports the old version 0 command, since u-boot and flashrom expect that to work. BUG=chrome-os-partner:20973 BRANCH=(all haswell); this will speed up flashing and software sync TEST=ectool flashinfo 1. old EC, new ectool -> only reports version 0 info 2. new EC, old ectool -> only reports version 0 info 3. new EC, new ectool -> reports new fields Change-Id: I484327fe22a58d2b69d7f6ac767b2d3e81b3e0b7 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/62378 Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'chip/host/config_chip.h')
-rw-r--r--chip/host/config_chip.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/chip/host/config_chip.h b/chip/host/config_chip.h
index 44ed02841a..1cbf7710d4 100644
--- a/chip/host/config_chip.h
+++ b/chip/host/config_chip.h
@@ -17,6 +17,7 @@ extern char __host_flash[CONFIG_FLASH_PHYSICAL_SIZE];
#define CONFIG_FLASH_BANK_SIZE 0x1000
#define CONFIG_FLASH_ERASE_SIZE 0x0400 /* erase bank size */
#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */
+#define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0080 /* ideal write size */
#define CONFIG_RAM_BASE 0x0 /* Not supported */
#define CONFIG_RAM_SIZE 0x0 /* Not supported */