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| author | Randall Spangler <rspangler@chromium.org> | 2013-07-15 16:17:32 -0700 |
|---|---|---|
| committer | ChromeBot <chrome-bot@google.com> | 2013-07-16 12:06:31 -0700 |
| commit | 0c73fdae773be0d42c969e4171b0504fcf06b97a (patch) | |
| tree | 120e5c72cc095911d5761f2004b959176bcc974c /chip/host/config_chip.h | |
| parent | 873e4425c5e27be3019b0ca47251e6fb94715bd3 (diff) | |
| download | chrome-ec-0c73fdae773be0d42c969e4171b0504fcf06b97a.tar.gz | |
Make a top-level config.h file to include sub-configs
This file will soon contain the exhaustive list of all CONFIG defines
and their descriptions.
Chip-level configs are renamed to config_chip.h to avoid naming
conflicts.
BUG=chrome-os-partner:18343
BRANCH=none
TEST=build all platforms
Change-Id: I9e94146f5b4c016894bd3ae3d371c4b9f3f69afe
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/62122
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/host/config_chip.h')
| -rw-r--r-- | chip/host/config_chip.h | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/chip/host/config_chip.h b/chip/host/config_chip.h new file mode 100644 index 0000000000..44ed02841a --- /dev/null +++ b/chip/host/config_chip.h @@ -0,0 +1,50 @@ +/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Chip config header file */ + +#ifndef __CROS_EC_CONFIG_CHIP_H +#define __CROS_EC_CONFIG_CHIP_H + +/* Memory mapping */ +#define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000 +#define CONFIG_FLASH_SIZE CONFIG_FLASH_PHYSICAL_SIZE +extern char __host_flash[CONFIG_FLASH_PHYSICAL_SIZE]; + +#define CONFIG_FLASH_BASE ((uintptr_t)__host_flash) +#define CONFIG_FLASH_BANK_SIZE 0x1000 +#define CONFIG_FLASH_ERASE_SIZE 0x0400 /* erase bank size */ +#define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ +#define CONFIG_RAM_BASE 0x0 /* Not supported */ +#define CONFIG_RAM_SIZE 0x0 /* Not supported */ + +/* Size of one firmware image in flash */ +#define CONFIG_FW_IMAGE_SIZE (64 * 1024) + +#define CONFIG_FW_RO_OFF 0 +#define CONFIG_FW_RO_SIZE (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE) +#define CONFIG_FW_RW_OFF CONFIG_FW_IMAGE_SIZE +#define CONFIG_FW_RW_SIZE CONFIG_FW_IMAGE_SIZE +#define CONFIG_FW_WP_RO_OFF CONFIG_FW_RO_OFF +#define CONFIG_FW_WP_RO_SIZE CONFIG_FW_IMAGE_SIZE + +/* Features */ +#define CONFIG_FLASH + +/* + * Put this after RO to give RW more space and make RO write protect region + * contiguous. + */ +#define CONFIG_FW_PSTATE_OFF CONFIG_FW_RO_SIZE +#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE + +/* Maximum number of deferrable functions */ +#define DEFERRABLE_MAX_COUNT 8 + +/* Interval between HOOK_TICK notifications */ +#define HOOK_TICK_INTERVAL (250 * MSEC) + +#endif /* __CROS_EC_CONFIG_CHIP_H */ + |